# Optimizing Noisy-Intermediate Scale Quantum Circuits: A Block-Based
Synthesis

Xin-Chuan Wu * Corresponding author<EMAIL_ADDRESS>Department of
Computer Science, University of Chicago, Chicago, IL 60637, USA  Marc Grau
Davis  Electrical Engineering and Computer Science, MIT, Cambridge, MA 02139,
USA  Frederic T. Chong  Department of Computer Science, University of Chicago,
Chicago, IL 60637, USA  Costin Iancu  Computational Research Division,
Lawrence Berkeley National Laboratory, Berkeley, CA 94720, USA

###### Abstract

The current phase of quantum computing is in the Noisy Intermediate-Scale
Quantum (NISQ) era. On NISQ devices, two-qubit gates such as CNOTs are much
noisier than single-qubit gates, so it is essential to minimize their count.
Quantum circuit synthesis is a process of decomposing an arbitrary unitary
into a sequence of quantum gates, and can be used as an optimization tool to
produce shorter circuits to improve overall circuit fidelity. However, the
time-to-solution of synthesis grows exponentially with the number of qubits.
As a result, synthesis is intractable for circuits on a large qubit scale.

In this paper, we propose a hierarchical, block-by-block optimization
framework, QGo, for quantum circuit optimization. Our approach allows an
exponential cost optimization to scale to large circuits. QGo uses a
combination of partitioning and synthesis: 1) partition the circuit into a
sequence of independent circuit blocks; 2) re-generate and optimize each block
using quantum synthesis; and 3) re-compose the final circuit by stitching all
the blocks together. We perform our analysis and show the fidelity
improvements in three different regimes: small-size circuits on real devices,
medium-size circuits on noise simulations, and large-size circuits on
analytical models. Using a set of NISQ benchmarks, we show that QGo can reduce
the number of CNOT gates by 29.9% on average and up to 50% when compared with
industrial compilers such as _t $|$ket$\rangle$_. When executed on the IBM
Athens system, shorter depth leads to higher circuit fidelity. We also
demonstrate the scalability of our QGo technique to optimize circuits of 60+
qubits. Our technique is the first demonstration of successfully employing and
scaling synthesis in the compilation toolchain for large circuits. Overall,
our approach is robust for direct incorporation in production compiler
toolchains.

##  I Introduction

Quantum Computing (QC) is expected to solve certain computational problems
that even the largest classical supercomputers cannot solve. QC algorithms
might have significant impact on areas such as quantum chemistry [55, 41],
cryptography [61], and machine learning [11]. Recently, QC devices up to 72
quantum bits (qubits) have been demonstrated by IBM and Google [36, 33]. The
current phase of QC is in the Noisy Intermediate-Scale Quantum (NISQ) era
[56]. On NISQ devices, quantum gates are noisy and their count must be
minimized to produce low-error circuits. In particular, two-qubit gates such
as CNOTs are much noisier than single-qubit gates. For NISQ devices, shorter
depth translates directly into higher circuit fidelity.

Quantum circuit synthesis provides an orthogonal circuit optimization method,
which generates a circuit from its high level mathematical description such as
unitary matrix. There are several existing studies in this field [58, 22, 24,
50, 1, 23, 21, 5, 42, 47, 29, 65, 70, 12]. Given an arbitrary quantum circuit,
we can compute the corresponding unitary, and then use synthesis to generate a
new circuit, which has a different sequence of gates from the original
circuit, but will be equivalent in terms of unitary operator performed.

However, synthesis algorithms face an “exponential” scalability challenge. For
a $n$-qubit circuit, the unitary size is $2^{n}\times 2^{n}$. The solving time
of synthesis scales exponentially with the number of qubits [1, 24, 21]. Thus,
synthesis is intractable for circuits beyond a handful of qubits.

To perform quantum synthesis for optimizing large scale circuits, we propose
our hierarchical, block-by-block, optimization framework, called QGo. QGo uses
a combination of partitioning and synthesis: 1) partition the circuit into
independent sub-blocks whose size can be successfully handled by synthesis; 2)
re-generate each block using synthesis; and 3) re-assemble the circuit. Figure
1 shows an example of QGo circuit optimization that partitions a 5-qubit
circuit into 3-qubit blocks. In general, partitioning a $n$-qubit circuit into
multiple $k$-qubit blocks ($k<n$) leads to replacing an algorithm with
$O(exp(n))$ complexity with a sequence of calls to $O(exp(k))$ algorithms. The
time-to-solution grows linearly with the number of $k$-qubit blocks, which is
a useful tradeoff when compared to the exponential scaling with the number of
qubits. After all blocks are synthesized, QGo then puts the blocks back
together to produce the final optimized circuit.

(a) Original circuit

(b) Partitioned circuit (c) Synthesized circuit (d) Optimized circuit

Figure 1: An example of QGo circuit optimization. (a) The original 5-qubit
circuit. (b)The original circuit is partitioned into three blocks, and each
block only contains gates on 3 qubits. The first circuit block is only on
$q_{0}$, $q_{1}$, and $q_{4}$. The second block is on $q_{1}$, $q_{2}$, and
$q_{4}$. The third block is on $q_{0}$, $q_{1}$, and $q_{3}$. All gates after
partitioning still respect the gate dependency in the original circuit. (c)
The synthesized circuit. After running quantum synthesis for each block, the
CNOT counts in the first and second block are reduced, and the third block
still has 2 CNOTs. (d) The single-qubit gates can be combined to produce the
final optimized circuit. This circuit is effectively equivalent to the
original circuit but with fewer CNOT gates. Figure 2: Our compilation
framework for scalable circuit optimization using synthesis (QGo).

QGo allows us to compile a quantum circuit to an optimized executable circuit
for a target hardware. QGo is a topology-aware compilation framework. The
overall flow is described in Figure 2. QGo includes four core modules:
physical qubit mapping, circuit partitioning, quantum synthesis, and circuit
composition. The input to QGo is a quantum circuit in a high-level quantum
program, together with a description of the topology of the target processor.
The first step in QGo is topology mapping of the circuit to the target
hardware. We leverage third party mappers and call into “traditional”
compilers to perform mapping. This approach allows us to select the best
mapper available for a given platform. We use the _t $|$ket$\rangle$_ compiler
for physical qubit mapping as it is reported to effectively produce short
circuits for several applications [64, 18]. We then run our partitioning
algorithm to select tunable size blocks of the circuit that are independent of
each other. In the synthesis procedure, each block is converted from its
circuit format into a unitary matrix and re-synthesized with a synthesis tool.
In this work, we use the state-of-the-art synthesis tool proposed in [21]. The
final output of QGo is the optimized circuit by stitching all the optimized
blocks together.

For evaluation we use a series of NISQ circuits as our benchmarks. To
understand the impact of the partitioning strategy we conduct experiments with
3- and 4-qubit blocks. We evaluate the quality of the generated circuits on
IBM’s Athens [37] device, as well as using noise simulation for medium-size
circuits and on our analytical model for large-size circuits.

The main contributions of this work are:

  * •

Our technique allows an exponential cost optimization tool to scale to large
circuits, and is the first demonstration of successfully employing and scaling
synthesis in the compilation toolchain for large circuit optimization.

  * •

QGo reduces the CNOT gate count well beyond the ability of existing compilers.
Using a set of NISQ benchmarks, we show that QGo can reduce the number of CNOT
gates by 29.9% on average and up to 50% compared with circuits optimized by _t
$|$ket$\rangle$_ compiler. These translate into direct fidelity improvements
when running on the IBM’s Athens device [19].

  * •

We evaluate fidelity improvements using 3 metrics for 3 scaling regimes:
small-size circuits using fidelity on real devices, medium-size circuits using
fidelity using simulations with noise, and large-size circuits using CNOT
reduction measured statically by our compiler. To validate the trends shown by
our simulations, we show that there is a 98% correlation between our real-
device results and our simulation results on small circuits. To show that our
CNOT reductions are also indicative of fidelity savings, we show there is a
78% correlation to real devices on small circuits and 76% correlation to
simulation on medium circuits.

  * •

We present the sensitivity analysis by running Qiskit noise simulations to
show the circuit fidelity improvements under different levels of gate errors.
The results indicate that QGo is important for NISQ devices.

  * •

We demonstrate the scalability of our technique to optimize the circuits of
60+ qubits. This demonstration suggests that QGo provides a viable path
towards higher fidelity for circuits on large scale qubits.

Our paper is organized as follows. In Section II, we introduce the principles
of quantum computation and quantum circuit synthesis techniques. In Section
III, we present our hierarchical, block-by-block, optimization tool flow and
discuss in detail the techniques that make up our compilation framework. In
Section IV, we describe our benchmarks and experimental environment. Section V
evaluates the performance of our QGo approach against industrial compilers. We
discuss future directions in Section VI. Section VII summarizes quantum
circuit optimization studies. Finally, we provide conclusions in Section VIII.

##  II Background

In this section, we briefly introduce the principles of quantum computation.
We then present the relevant background on quantum circuit synthesis.

###  II-A Principles of Quantum Computation

A qubit is a two-level quantum system, represented by two orthonormal
computational basis states $\ket{0}$ and $\ket{1}$. The quantum state of a
qubit can be described by any linear combination of $\ket{0}$ and $\ket{1}$:
$\ket{\psi}=\alpha\ket{0}+\beta\ket{1}$, where $\alpha$ and $\beta$ are
complex numbers satisfying $|\alpha|^{2}+|\beta|^{2}=1$. More generally, the
state of a $n$-qubit quantum system can be represented by using $2^{n}$
amplitudes.

A quantum circuit consists of a sequence of quantum gates on qubits, and a
quantum gate is a unitary operator, $U$. The effect of a gate on a quantum
state can be expressed as $\ket{\psi^{\prime}}=U\ket{\psi}$. Gates are applied
to one or many qubits simultaneously. Two-qubit controlled gates and arbitrary
single-qubit gates are known to be universal [26]. CNOT gates and single-qubit
rotation gates ($R_{x},R_{y},R_{z}$) constitute a commonly used universal gate
set for quantum programming.

###  II-B Quantum Circuit Synthesis

Quantum circuit synthesis is the process of taking a description of a desired
unitary matrix and decomposing it into a sequence of smaller unitaries,
representing the gates in a circuit that implements the target unitary. One of
the earliest techniques was the Solovay-Kitaev algorithm[22, 50, 1], which
combined a recursive matrix decomposition technique with numerical methods
required for the base case. This method served as a proof-of-concept for the
field of synthesis, but the circuits it produces are very long. One of the
main goals of synthesis is to produce “short” circuits, minimizing metrics
such as CNOT count, total gate count, and critical path length. CNOT count is
of particular importance on NISQ devices, since they contribute significantly
more to the overall noise and runtime of circuits than single-qubit gates.
Because of this, CNOT count has been a particular target for synthesis
approaches. The approach shown in [5] is able to find minimal length circuits
according to a weighting of different gates, and demonstrates a significant
advantage over the Solovay-Kitaev approach. The approaches shown in [42] and
[24] focus on synthesis runtime, which is another metric needed for synthesis
to be practical. All of these techniques mentioned so far work solely with
discrete gatesets, where only a finite number of base gates are allowed.
However, most current quantum devices can perform continuously varying gates.
For example, superconducting qubits use virtual Z rotations, which can be
performed with any angle, and trapped ion qubits can perform X and Y rotations
with any angle. These continuous gates can be used to perform any single qubit
rotation, usually parameterized as
$Z(\theta_{1})X(\frac{\pi}{2})Z(\theta_{2})X(\frac{\pi}{2})Z(\theta_{3})$ or
$X(\theta_{1})Y(\theta_{2})Z(\theta_{3})$. Leveraging this capability, the KAK
decomposition can perform optimal 2-qubit synthesis to perform any 2 qubit
unitary with at most 3 CNOTs [65]. The approach shown in [58] uses the cosine-
sine decomposition to produce universal gates for any number of qubits, which
can perform any unitary simply by changing the parameters. Other approaches
use numerical optimization of parameterized gates to find high quality
circuits [47, 21, 70].

We employ the search-based numerical synthesis method described in [21]. This
technique builds a search tree of CNOT structures filled in with parameterized
single-qubit gates, and employs numerical optimization to evaluate the CNOT
structure at each node in the search. A* search is used to find the shortest
CNOT structure that can implement the desired unitary, and numerical
optimization is used to find parameters for the single-qubit gates to produce
a fully instantiated circuit. We choose this technique because of its ability
to minimize CNOT count.

##  III Scalable Circuit Optimization using Synthesis

Quantum synthesis is a powerful tool for circuit optimization. However, it is
not scalable for large circuits. To optimize asymptotically large circuits, we
develop our block-by-block optimization technique, called QGo. QGo allows us
to compile a high-level quantum program to a hardware topology-aware
executable circuit. QGo takes the device qubit connectivity and a quantum
program as inputs, and produces a compiled executable circuit, minimizing the
CNOT gate count by using synthesis.

###  III-A QGo Overview

Figure 2 shows an overview of QGo. It contains four core compiler components:
physical qubit mapping, circuit partitioning, quantum synthesis, and the
circuit composition procedure. The inputs for QGo consist of a high-level
quantum program and a target device connectivity description. First, QGo
performs physical qubit mapping to assign the logical qubits to physical
qubits and to resolve all unexecutable two-qubit gates by adding swap gates.
Since our goal is to produce an optimized topology-aware circuit, if we
perform physical qubit mapping after quantum synthesis, there will be swap
gates inevitably added into the final circuit. Therefore, we perform physical
qubit mapping before quantum synthesis, so that the swap gates added into the
circuit become a part of the input circuit for the circuit synthesis, and
hence the final circuit would have a reduced CNOT gate count. Second, QGo
partitions the circuit into multiple small circuit blocks. Each block only
interacts with a few qubits. The qubit group mapping is generated to indicate
what qubits are involved for each circuit block. This qubit group mapping
information will be used for the later circuit composition procedure. Since
the number of qubits in a block reflects the size of the corresponding unitary
matrix, we demonstrate the partitioning of 3-qubit and 4-qubit blocks in this
work, but the block size can be further increased. In general, a larger
unitary matrix would take exponentially longer time to decompose into a
sequence of gates. A circuit partitioned with a larger block size would have
fewer blocks, and each block tends to allow the synthesizer to decide circuit
elements rather than the mapping algorithm, and hence the final optimized
circuit would have fewer CNOTs. Thus, the block size is a trade-off between
the time-to-solution and the quality of solution (CNOT reduction). Next,
quantum synthesis is applied to the partitioned circuit blocks. We use the
state-of-the-art synthesis tool proposed in [21] for our work. Finally, QGo
performs the circuit composition by following the qubit group mapping to
concatenate the synthesized blocks to produce the final optimized circuit.

###  III-B Physical Qubit Mapping

Given an input quantum circuit and the qubit connectivity graph, physical
qubit mapping is to find an initial qubit mapping and insert swap gates to
satisfy all two-qubit interactions and try to minimize the total number of
swap gates and circuit depth in the final hardware-compliant circuit. Physical
qubit mapping problem is NP-Complete [62]. Several approaches for solving this
problem have been proposed [8, 68, 46, 19, 48, 15, 54, 44, 38, 64, 69, 71].

We design the physical qubit mapping as the first step of QGo because we want
to have the additional swaps gates to be part of the input circuit for the
remaining optimization process, so that the optimization by quantum synthesis
can reduce the CNOT gate count in the final circuit. In addition, we also find
that most quantum applications have certain repeated CNOT patterns, and
existing qubit mapping algorithms will perform better by leveraging the
structure of these patterns. If the synthesis process runs before physical
qubit mapping, the pattern will be destroyed, and the number of additional
swap gates will increase in some cases. Thus, performing physical qubit
mapping before synthesis can benefit the overall optimization.

We compare industrial compilers such as IBM Qiskit [19] and _t
$|$ket$\rangle$_ compilers [64]. Since the _t $|$ket$\rangle$_ compiler
produces shorter circuits in our experiments and is reported to produce
shorter circuits for several quantum applications compared with other
techniques [18], we adopt the _t $|$ket$\rangle$_ compiler for physical qubit
mapping in our QGo.

###  III-C Circuit Partitioning

TABLE I: Notations used in our algorithm. Notation | Definition
---|---
$n$ | The total number of qubits in a circuit
$k$ | The total number of qubits in a partitioned block
$g_{i}$ |  A gate operation. $i$ is the index of the gate.
$q_{i}$ |  A qubit. $i$ is the index of the qubit.
$Q_{i}$ |  A qubit group. $i$ is the index of the group.
$E_{Q_{i}}$ |  A set of executable gates on $Q_{i}$
$G$ | Gate dependency graph
$B$ | A list of partitioned blocks
$M$ | A list of qubit group mapping

QGo partitions a circuit into multiple small circuit blocks. Each block
contains gates only on a small group of qubits. Figure 1 shows an example of
partitioning. Each circuit block consists of 3 qubits (Figure 1(b)). Since the
CNOT reduction would be higher when there are more CNOTs in a block, the goal
of partitioning is to _find a block with the number of qubits and biggest
number of CNOTs_. Thus, we propose our algorithm: we use a greedy-based
heuristic approach. This is an efficient approach; compared with other
partitioning algorithms such as dynamic programming that would be limited by
circuit depth, our heuristic algorithm is scalable for large-scale circuit
partitioning. We summarize the notations used in our algorithm in Table I.

Before our heuristic algorithm, we define a few terms used in our algorithm.

Qubit group. A qubit group is a set of qubits in a circuit block. For a
$n$-qubit circuit, there are ${n\choose k}$ different combinations of qubit
groups for a $k$-qubit block. For example, the circuit shown in Figure 1(a) is
a 5-qubit circuit. For partitioning the circuit into 3-qubit blocks,
$\\{q_{0},q_{1},q_{2}\\},\\{q_{0},q_{1},q_{3}\\},...,$ and
$\\{q_{2},q_{3},q_{4}\\}$ are possible qubit groups for a block. Figure 1(b)
shows the circuit after partitioning. The qubit group of the 1st block is
$\\{q_{0},q_{1},q_{4}\\}$, and the 2nd block is $\\{q_{1},q_{2},q_{4}\\}$, and
the 3rd block is $\\{q_{0},q_{1},q_{3}\\}$. We use $Q_{i}$ to denote a qubit
group in this paper, where $i=1,2,...,{n\choose k}$. The qubit group size $k$
is limited to a small number due to the limitation of quantum synthesis. In
this paper, we focus our analysis on the size of 3 and 4 qubits in a qubit
group.

Valid qubit group. Since the input circuit for our partitioning algorithm is a
physical qubit mapped circuit, all two-qubit gates are applied on the neighbor
qubits. We can define _valid qubit groups_ by considering device connectivity
to reduce the search space in our algorithm. We map the qubit group onto the
device connectivity graph. If a qubit group is a connected component, it is a
valid qubit group; otherwise, it is an invalid group. Figure 3 shows an
example of a valid qubit group. Considering a $3\times 3$ grid connectivity,
the qubit group $\\{q_{0},q_{3},q_{6}\\}$ is a valid qubit group. However, the
qubit group $\\{q_{2},q_{7},q_{8}\\}$ is an invalid qubit group. When
partitioning a circuit, we only need to consider valid qubit groups.

Figure 3: Example of valid and invalid qubit groups.

Gate dependency graph. We use a Directed Acyclic Graph (DAG) to represent the
gate dependency of a circuit. In a DAG, a node represents a gate, and an edge
is the qubit involved for the gate. A gate can be executed only when all the
previous gates have been executed. Figure 4 shows an example of gate
dependency graph. The DAG in Figure 4(b) is generated from the original
circuit (Figure 4(a)). For example, the gate $g_{5}$ depends on $g_{1}$ and
$g_{2}$ because $q_{0}$ is used for $g_{1}$ and $g_{5}$, and $q_{1}$ is used
for $g_{2}$ and $g_{5}$. Thus, $g_{5}$ can be executed only after both $g_{1}$
and $g_{2}$ are executed.

Executable gates on a qubit group. A single-qubit gate on $q_{i}$ can count as
an executable gate on a qubit group $Q_{i}$ only when $q_{i}\in Q_{i}$ and all
previous gates on $q_{i}$ are executable gates on $Q_{i}$. A two-qubit gate on
($q_{i},q_{j}$) can count as an executable gate on a qubit group $Q_{i}$ only
when both $q_{i},q_{j}\in Q_{i}$ and all previous gates on $q_{i}$ and $q_{j}$
are executable gates on $Q_{i}$. In Figure 4, for example, when we count the
executable gates on the qubit group $\\{q_{0},q_{1},q_{2}\\}$, the gate
$g_{9}$ is an executable gate because $q_{0}$ and $q_{1}$ are in the qubit
group and all the previous gates on $q_{0}$ and $q_{1}$ are also executable
gates. However, $g_{4}$ is not an executable gate on this qubit group because
$q_{3}$ is not in the target qubit group. We use $E_{Q_{i}}$ to denote the
largest set of executable gates on the qubit group $Q_{i}$. We can get each
$E_{Q_{i}}$ by traversing the gate dependency graph. Figure 4(c) and Figure
4(d) show $E_{\\{q_{0},q_{1},q_{2}\\}}$ and $E_{\\{q_{0},q_{1},q_{3}\\}}$,
respectively.

(a) Original circuit

(b) Gate dependency graph

(c) Executable gates on qubit group $\\{q_{0},q_{1},q_{2}\\}$.

(d) Executable gates on qubit group $\\{q_{0},q_{1},q_{3}\\}$.

Figure 4: An example of gate dependency graph and executable gates on a qubit
group. Algorithm 1 Circuit Partitioning

1:Convert the circuit into a gate dependency graph $G$.

2:$B\leftarrow\phi$

3:$M\leftarrow\phi$

4:while $G$ is not empty do

5: for each valid qubit group $Q_{i}$ do

6: $E_{Q_{i}}\leftarrow\\{\text{Executable Gates on }Q_{i}\\}$

7: Compute $Score(E_{Q_{i}})$

8: end for

9: Select the $E_{Q_{m}}$ with the maximal score;

10: $B.append(E_{Q_{m}})$

11: $M.append(Q_{m})$

12: $G\leftarrow G-E_{Q_{m}}$

13:end while

14:Output the sequence of circuit blocks $B$ and the list of qubit group
mapping $M$

Algorithm 1 shows our partitioning procedure. First, we prepare the gate
dependency graph $G$ for the target circuit. Next, we collect the set of
executable gates, $E_{Q_{i}}$, for each qubit group, and also compute the
score for each $E_{Q_{i}}$. Since the objective is to find the biggest circuit
block, we select the $E_{Q_{m}}$ with the maximal score as the partitioned
block, and save the $Q_{m}$ as the qubit group mapping for this block. Once a
circuit block is partitioned, we remove the block from the gate dependency
graph $G$, and repeat the procedure to find the next circuit block partition
until the gate dependency graph $G$ is empty, which means the entire circuit
is partitioned. Finally, a sequence of circuit blocks $B$ and a list of qubit
group mapping $M$ are the output of the circuit partitioning process.

The heuristic cost function indicates the number of executable gates for a
qubit group. The general form of our heuristic cost function for a qubit group
$Q_{i}$ is shown as follows:

$Score(E_{Q_{i}})=N_{E_{Q_{i}}},$ (1)

where $N_{E_{Q_{i}}}$ is the number of executable CNOT gates on $Q_{i}$. Since
the objective of partitioning is to find a block for quantum synthesis to
minimize the CNOT count, a block with more CNOT gates can potentially achieve
higher CNOT reduction. Thus, we use CNOT count as the score function.

The time complexity of our heuristic algorithm for partitioning a circuit into
$k$-qubit blocks is $O(n^{k}g)$, where $n$ is the number of qubits in the
original circuit, $g$ is the total number of gates, $k$ is the number of
qubits in a partitioned block.

###  III-D Quantum Circuit Synthesis

After the circuit is partitioned into multiple blocks, QGo applies quantum
synthesis for each circuit block. We integrate the state-of-the-art synthesis
tool proposed in [21] into our QGo framework. For each circuit block, QGo
computes the corresponding unitary matrix, and this matrix is the input for
the synthesis process. As the synthesized circuit should respect the hardware
topology, the qubit group for each block and the device connectivity are also
the input parameters for the synthesis tool. With our block-based synthesis
scheme, the time-to-solution for a $n$-qubit circuit is reduced from
$O(exp(n))$ to $O(exp(k))$.

After the synthesis, there is an undesired synthesis distance due to numerical
approximation, leading the final unitary at a distance from the original
unitary [51, 21, 70]. As a result, the final unitary distance is in the range
of $10^{-10}$ to $10^{-15}$. In the NISQ era, when running a quantum circuit
on a real machine, the unitary executed is different from the original
intended unitary due to the presence of noise. Since gate errors are multiple
orders of magnitudes larger than synthesis distances, these synthesis
distances are insignificant. In Section V-B we will show that this distance
only causes negligible impact on the overall state fidelity.

###  III-E Circuit Composition

Once all circuit blocks have been synthesized, QGo composes the entire circuit
by stitching all circuit blocks. The list of qubit group mappings provide the
qubit mapping information to connect blocks correctly. In general, the number
of CNOTs in the synthesized block is less than in the original block. If the
synthesized circuit block has an equal or greater number of CNOTs compared to
the original block, QGo will choose to use the original circuit block to the
circuit composition to avoid unnecessary synthesis distance due to floating
point errors. Once all blocks are put together, QGo combines the adjacent
single-qubit gates to further reduce the gate count, and produces the final
optimized circuit.

##  IV Experimental Setup

In this section, we describe a set of benchmarks used in our evaluation as
well as the experimental parameters.

###  IV-A Benchmarks

TABLE II: List of benchmarks. Size | Application | Qubits | Description
---|---|---|---
Small | QAOA5 | 5 | QAOA on MaxCut problem
TFIM5 | 5 | Transverse-field Ising model
MUL5 | 5 | Multiplier arithmetic function
ADDER4 | 4 | Adder arithmetic function
QFT5 | 5 | Quantum Fourier transform
HLF5 | 5 | Hidden linear function
Medium | QAOA10 | 10 | QAOA on MaxCut problem
TFIM10 | 10 | Transverse-field Ising model
MUL10 | 10 | Multiplier arithmetic function
ADDER9 | 9 | Adder arithmetic function
QFT9 | 9 | Quantum Fourier transform
HLF9 | 9 | Hidden linear function
Large | MUL60 | 60 | Multiplier arithmetic function
ADDER63 | 63 | Adder arithmetic function
QFT64 | 64 | Quantum Fourier transform

To evaluate QGo against real applications, we select multiple important
quantum applications as our benchmarks. Table II lists the applications and
brief description in our evaluation. We have three sets of applications
according to the different sizes of the circuits. The first set consists of
small-size circuits on 4 and 5 qubits; the second set is the medium-size of 9-
and 10-qubit circuits; and the third set of benchmarks, large-size circuits,
contains circuits beyond 60 qubits. In our evaluation, we run the small-size
circuits on a 5-qubit quantum device, Athens, provided by IBM quantum
experience platform to demonstrate how much circuit fidelity is improved
through our optimization on a real NISQ machine. Next, we run our medium-size
benchmarks by using Qiskit noisy simulators to show the fidelity improvement
under different levels of gate errors. Finally, we use the large-size
benchmarks to demonstrate the scalability of our QGo technique.

Quantum Approximate Optimization Algorithm (QAOA) is a hybrid quantum-
classical variational algorithm and it is one of the most important quantum
algorithms in the NISQ era [27]. In our study, the QAOA application is a
hardware-efficiency ansatz [49] for MaxCut problem. Transverse Field Ising
Model (TFIM) is for problems that study the time evolution of chemical systems
[60, 35]. Multiplier (MUL) [28] and adder [28, 20] benchmarks are important
arithmetic functions in several quantum applications. Quantum Fourier
transform (QFT) [39] is a kernel function in many quantum algorithms such as
phase estimation algorithm [17], Shor’s algorithm [61], and the algorithm for
hidden subgroup problem [40]. Hidden Linear Function (HLF) is a quantum
circuit solving a problem from a previous study [13].

Figure 5: Experimental platform used in our evaluation.

###  IV-B Experimental Parameters

We evaluate our QGo with 3-qubit and 4-qubit blocks on different sizes of
circuits. All QGo processes and noisy simulations are carried out on a Ubuntu
16.04 system with Intel Xeon Silver 4110 32-core CPU (2.1 GHz) and 128GB RAM.

Figure 5 summarizes our fidelity analysis. For small circuits, we show the
experimental results on IBM’s Athens device (Section V-C). For medium
circuits, we run the experiments on noise simulations (Section V-D). Finally,
we use our analytical model to perform the fidelity results for large circuits
(Section V-E). The _t $|$ket$\rangle$_ compiler with the highest optimization
level is the baseline in our evaluation. The _t $|$ket$\rangle$_ compiler is
reported to effectively produce shorter circuits for several applications
compared with other compilers [64, 18].

(a) Total number of CNOTs in the circuits optimized by the baseline compiler
and QGo.

(b) CNOT reduction rate compared with the baseline compiler.

Figure 6: The numbers of CNOTs are reduced in the QGo-optimized circuits. In
general, QGo-4 can achieve higher CNOT reduction rate than QGo-3. Figure 7:
Average CNOT count in a block.

##  V Evaluation

In our evaluation, we first show the CNOT reduction in the QGo-optimized
circuits compared to the baseline (_t $|$ket$\rangle$_) optimization, and we
compare the compilation time using 3-qubit and 4-qubit blocks. We then discuss
the impact of synthesis distance on the quantum state. Next, we present the
results running on a real quantum device, IBM’s 5-qubit device (Athens), to
prove that our technique is critical for the current devices. Then a
sensitivity analysis is performed to show how much circuit fidelity is
improved under different gate errors. We also demonstrate the scalability of
QGo by optimizing large circuits.

###  V-A CNOT Reduction

We use the _t $|$ket$\rangle$_ compiler to map 4- and 5-qubit circuits on the
IBM’s Athens topology, which is a linear connectivity, and map 9- and 10-qubit
circuits on a 2D lattice of physical qubits. As discussed in Section III-B, we
compare industrial compilers such as IBM Qiskit [19] and _t $|$ket$\rangle$_
compilers [64]. Since the _t $|$ket$\rangle$_ compiler is shown to generate
shorter circuits for several quantum applications [18], we use the circuits
optimized by _t $|$ket$\rangle$_ compiler as our baseline. The circuits
optimized using our QGo with 3-qubit blocks and 4-qubit blocks are denoted as
QGo-3 and QGo-4, respectively. Figure 6 shows the total number of CNOTs in the
circuits optimized by the baseline and QGo. Our QGo optimization reduces the
total number of CNOTs. For MUL5 and HLF5, QGo-3 does not reduce the CNOT count
because there is only a small number of CNOTs in a block. QGo-4 can reduce the
CNOT counts across all benchmarks. The average CNOT reduction of QGo-4 is
29.9%. In general, QGo-4 can achieve more CNOT reduction when compared with
QGo-3 because a large block will have more CNOTs in a block, and this is
easier for the synthesis to find a circuit using less CNOTs than the original
circuit block. Figure 7 shows the average CNOT count in a block. If a circuit
is partitioned into 4-qubit blocks, the average CNOT count per block is higher
when compared with 3-qubit blocks. As a result, QGo-4 can achieve higher CNOT
reduction. However, the time-to-solution of QGo-4 is much longer than QGo-3
(Figure 8).

###  V-B Impact of Synthesis Distance

As discussed in Section III-D, since there is a synthesis distance due to
numerical approximation, the final state is not exactly the same as the ideal
state of the original circuit. In order to analyze the impact of synthesis
distance, we use ideal simulation to obtain the final states of the original
circuit and synthesized circuit, and calculate the state infidelity [51].
Figure 9 shows the state infidelity. Since the unitary matrix distance of
4-qubit circuit synthesis is fundamentally larger than 3-qubit circuit
synthesis, QGo-4 has slightly larger state infidelity when compared with
QGo-3. The state infidelity of each optimized circuit is less than $10^{-12}$.
This is insignificant when compared with the gate error in the NISQ era. The
current gate infidelity on real devices is ranged from $10^{-1}$ to $10^{-6}$.
Thus, the impact of synthesis distance is negligible.

Figure 8: Compilation time. A block with larger size takes more time to
synthesize the circuit block.  Figure 9: State infidelity due to the synthesis
distance. Compared with the gate error on NISQ devices, the state infidelity
due to synthesis distance is negligible.

###  V-C Running on Real Hardware

To measure how much improvement our QGo technique can achieve on the current
available NISQ machines, we perform our experiments on quantum devices. Since
our medium-size and large-size circuits are too deep for the current quantum
devices to generate meaningful results, we choose small-size circuits for this
evaluation. We run the small-size benchmarks on IBM’s Athens device [37]. We
use total variation distance, $d_{TV}$, to compare measurement samples of the
real device with those of the ideal simulation. Total variation distance is
commonly used as a metric for QC experiments [7, 45, 6, 25]. Lower $d_{TV}$
means the samples of the real device are closer to the ideal distribution.
Figure 10 shows the results on IBM’s Athens, a 5-qubit device; each data point
is obtained from 8192 shots of the circuit execution. We observe that QGo
achieves lower total variation distance for all benchmarks compared with the
baseline optimization, and the distance results are correlated to the number
of CNOT reduction. Even though the synthesis distance with 4-qubit blocks is
larger than with 3-qubit blocks, QGo-4 can achieve lower $d_{TV}$ due to more
CNOT reduction. Figure 11 shows the correlation between CNOT reduction rate
and $d_{TV}$ improvement ($\Delta d_{TV}$) compared with the baseline. The
correlation coefficient is 78%. The results show that our CNOT reductions are
indicative of fidelity savings. The results suggest that our QGo optimization
technique is important in the NISQ era, and is applicable to the current
quantum devices.

Figure 10: Running optimized small circuits on IBM’s Athens, a 5-qubit device.
(Lower $d_{TV}$ is better.) Figure 11: Correlation between CNOT reduction rate
and $d_{TV}$ improvement measured on IBM’s Athens. Each data point is a
benchmark from the small set. The correlation coefficient is 78%. The results
show that our CNOT reductions are indicative of fidelity savings.

###  V-D Running on Noise Simulation

To understand the performance of QGo optimization for medium circuits, we run
the experiments on IBM Qiskit Aer noise simulation [2] because the medium
circuits are too deep to get meaningful results on the current available real
devices. To validate the trends shown by our simulations, we run small
circuits on both real devices and simulations to see the correlation between
them. Figure 12 shows the results from noise simulation. Compared with the
results on IBM’s Athens (Figure 10), the $d_{TV}$ improvements are correlated
in both experiments. There is a 98% correlation between our real-device
results and our simulation results on small circuits (Figure 13). For medium
circuits on simulation, we show the correlation between CNOT reduction rate
and $d_{TV}$ improvement compared with the baseline in Figure 14. The
correlation coefficient is 76%.

We perform sensitivity analysis by running noise simulations for medium
circuits with different gate errors. Figure 15 shows the noise simulation
results. We simulate depolarize_noise for two-qubit gate noises with the gate
error probability from 0.1% to 2.5%. We can observe that QGo can reduce more
$d_{TV}$ when the gate error is large.

Figure 12: Running optimized small circuits on Qiskit noise simulation. (Lower
$d_{TV}$ is better.) Figure 13: Correlation between $d_{TV}$ results on the
real device and noise simulation. Each data point is a benchmark from the
small set. The correlation coefficient is 98%. Figure 14: Correlation between
CNOT reduction rate and $d_{TV}$ improvement measured on noise simulation.
Each data point is a benchmark from the medium set. The correlation
coefficient is 76%.

(a) QAOA10

(b) TFIM10

(c) MUL10

(d) ADDER9

(e) QFT9

(f) HLF9

Figure 15:  Realistic noise simulation results of $d_{TV}$ under different
levels of gate error. (Lower $d_{TV}$ is better.)

###  V-E Scalability

To demonstrate the scalability of our QGo technique, we optimize the large-
scale (60+ qubits) benchmarks using QGo. We map the large-scale circuits on a
2D ($8\times 8$) lattice of physical qubits. Figure 16 shows the total number
of CNOTs optimized by the baseline compiler and QGo, and Figure 18 shows the
CNOT reduction rate. With large-size circuits, QGo-3 and QGo-4 achieves 22.8%
and 28.9% CNOT reduction on average. QGo-4 performs better than QGo-3 in terms
of CNOT reduction, but it takes longer time to complete the optimization.
Figure 17 shows the compilation time of large-scale circuit optimization.
QGo-3 can complete the optimization within a few minutes, and QGo-4 can finish
the optimization process within a few hours.

Since the scale is too large to perform noise simulation, we use an analytical
model to estimate the success rate of each circuit. The success rates in our
evaluation are computed by a worst-case analysis using gate success rates.
Multiplying the gate success rates, we can obtain the estimated success rate
for the whole circuit. Figure 19 shows the results under different gate error
models. Since our QGo-4 has the lowest CNOT count, it is projected to achieve
the highest success rates for all benchmarks. The success rate improvement is
greater when there is a larger gate error.

Figure 16: The number of CNOTs in the optimized large-scale circuits. Figure
17: Compilation time of large-scale circuit optimization. Figure 18: CNOT
reduction rate of large-scale circuits.

(a) MUL60

(b) ADDER63

(c) QFT64

Figure 19: Circuit success rate under different levels of gate errors. (Higher
circuit success rate is better.)

###  V-F Discussion

The results show the general applicability of our approach. Having access to
3-qubit block synthesis already enables good optimization results on large
circuits. In general, larger block size can achieve more CNOT reduction.
Running synthesis with 5-qubit blocks is possible, but the solving time is
much longer.

QGo allows composability with any mapper available for a given platform and we
have experimented with _t $|$ket$\rangle$_ compiler. Our preliminary
sensitivity analysis of circuit quality to mapping quality indicates there is
a direct correlation between QGo efficacy and mapping quality. The best
quality mappings have highly interconnected components. In our conjecture, the
better mapper provides the higher opportunity of forming large blocks, thus
motivating improvements in both mapping and synthesis. Our study offers
insights for future compiler design.

##  VI Future Work

Even though QGo already achieves successful results in optimizing different
sizes of circuits, we discuss a few directions that would further extend the
line of this research and improve the development of quantum computing.

###  VI-A Approximate Synthesis

The objective of optimization using synthesis is to reduce the CNOT count. In
some cases, it may be desirable to make approximations to reduce the number of
CNOTs at the expense of how closely the final circuit approximates the desired
unitary. An intuitive way to achieve this is to relax a synthesis threshold.
The synthesis tool that we used is capable of doing this, but even when
loosening the threshold as far as $10^{-}4$, we found no reduction. The
limiting factor on approximation in this case is that the heuristic, process
infidelity, is not flexible in a way needed to find good approximations. In
order to effectively trade accuracy for CNOT count, a threshold-controllable
synthesis tool is necessary. Integrating a different synthesis tool or
heuristic that is designed for approximate synthesis may further improve the
optimization.

###  VI-B Pulse-Level Optimization

Since the device-level control of a quantum computer is operated via analog
pulses, recent pulse optimization studies aim to generate shorter pulses [30,
59, 31, 32, 16]. Pulse optimization can also be integrated into our QGo
technique. The current synthesis output is a sequence of quantum gates. To
integrate pulse optimization into this work, we can synthesize the block into
a sequence of pulses.

###  VI-C QGo in Parallel

In this work, we perform the quantum synthesis in serial. However, since we
partition a circuit into a sequence of circuit blocks, each block is
independent for the synthesis process. As a result, the synthesis of blocks
can be executed in parallel. Running the entire QGo on a supercomputing system
can reduce the overall compilation time significantly.

##  VII Related Work

Several studies of circuit optimization have been carried out. Most of the
existing techniques focus on optimizing the qubit mapping and swap insertion
to reduce circuit depth. One common approach is to describe the problem in a
mathematical form, such as integer linear programming, and then find the
optimal solutions by using solvers [8, 68, 46, 48, 34]. This approach only
works for small circuits since the time scaling is exponential. Another
approach is to find the optimal solutions by using dynamic programming [63,
38]. However, since the solving time grows exponentially, this method only
works for a handful of qubits. Recent studies propose using heuristic search
algorithms to find good solutions to avoid long execution times [38, 44, 71,
3, 57, 67, 43, 10]. However, these approaches keep the original CNOT count and
only reduce the additional swap count. Our synthesis approach can reduce both
swap count and CNOT count used in the circuits.

Previous studies have applied synthesis technique to optimize some specific
circuits such as classical reversible circuits [9, 34, 66, 4] or Clifford+T
circuits [53, 52]. In this work, our approach is designed for general
circuits. However, since we can easily change the core synthesis tool, these
synthesis approaches can be integrated in our compiler framework to improve
the optimization for these specific circuits.

Our approach relies on synthesis techniques that are able to produce extremely
short circuits. Otherwise, it is unlikely that we will be able to see an
improvement when resynthesizing sub-circuits. The KAK decomposition could be
used for resynthesizing 2-qubit blocks [65]. We have seen improvement when
using larger block sizes, so we use the search-based technique found in [21],
which can handle circuits as large as 4 qubits. For scaling further, we are
considering the approach found in [70], which produces slightly longer
circuits, but offers a better scaling runtime when compared to the search-
based approach.

Recent studies such as [12] propose the removal of the constraint of unitary
operations by adding ancilla qubits. Additionally, [14] uses ancillas and an
approximation technique to produce very short circuits. To achieve greater
CNOT reduction, integrating ancillas and approximate synthesis into our QGo is
a promising research direction.

##  VIII Conclusion

In the NISQ era, since two-qubit gates are much noisier than single-qubit
gates, it is essential to minimize their count. Synthesis is a powerful tool
for circuit optimization to produce shorter circuits to improve the overall
circuit fidelity. However, synthesis is only applicable for small circuits. In
this work, we present an automated compilation framework, QGo. It partitions
the circuit into blocks, and re-generates each optimized block by using
synthesis, and re-composes the circuit by stitching all the blocks together.
Our approach to circuit optimization offers a role for quantum synthesis
algorithms in large-scale quantum computing scenarios. We evaluate fidelity
improvements using 3 metrics for 3 scaling regimes: small-size circuits using
fidelity on real devices, medium-size circuits using fidelity using
simulations with noise, and large-size circuits using CNOT reduction measured
statically by our compiler. The results show that our technique has practical
value on current devices and is reliable in the NISQ era. We also discuss
using approximate synthesis to further trade for circuit depth and pulse-level
optimization. Our study of circuit optimization using synthesis offers
insights for future compiler design.

## References

  * [1] O. Al-Ta’ani, “Quantum circuit synthesis using solovay-kitaev algorithm and optimization techniques,” Ph.D. dissertation, Kansas State University, 2015.
  * [2] G. Aleksandrowicz, T. Alexander, P. Barkoutsos, L. Bello, Y. Ben-Haim, D. Bucher, F. Cabrera-Hernández, J. Carballo-Franquis, A. Chen, C. Chen _et al._ , “Qiskit: An open-source framework for quantum computing,” _Accessed on: Mar_ , vol. 16, 2019.
  * [3] M. AlFailakawi, I. Ahmad, and S. Hamdan, “Lnn reversible circuit realization using fast harmony search based heuristic,” in _Asia-Pacific Conference on Computer Science and Electrical Engineering_ , 2014.
  * [4] Z. Alwardi, R. Wille, and R. Drechsler, “Synthesis of reversible circuits using conventional hardware description languages,” in _2018 IEEE 48th International Symposium on Multiple-Valued Logic (ISMVL)_. IEEE, 2018, pp. 97–102.
  * [5] M. Amy, D. Maslov, M. Mosca, and M. Roetteler, “A meet-in-the-middle algorithm for fast synthesis of depth-optimal quantum circuits,” _IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems_ , vol. 32, no. 6, pp. 818–830, 2013.
  * [6] F. Arute, K. Arya, R. Babbush, D. Bacon, J. C. Bardin, R. Barends, R. Biswas, S. Boixo, F. G. Brandao, D. A. Buell _et al._ , “Quantum supremacy using a programmable superconducting processor,” _Nature_ , vol. 574, no. 7779, pp. 505–510, 2019.
  * [7] C. Bădescu, R. O’Donnell, and J. Wright, “Quantum state certification,” in _Proceedings of the 51st Annual ACM SIGACT Symposium on Theory of Computing_ , 2019, pp. 503–514.
  * [8] T. Bahreini and N. Mohammadzadeh, “An MINLP model for scheduling and placement of quantum circuits with a heuristic solution approach,” _ACM Journal on Emerging Technologies in Computing Systems (JETC)_ , vol. 12, no. 3, pp. 1–20, 2015.
  * [9] C. Bandyopadhyay, R. Wille, R. Drechsler, and H. Rahaman, “Post synthesis-optimization of reversible circuit using template matching,” in _2020 24th International Symposium on VLSI Design and Test (VDAT)_. IEEE, 2020, pp. 1–4.
  * [10] A. Bhattacharjee, C. Bandyopadhyay, R. Wille, R. Drechsler, and H. Rahaman, “A novel approach for nearest neighbor realization of 2D quantum circuits,” in _2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)_. IEEE, 2018, pp. 305–310.
  * [11] J. Biamonte, P. Wittek, N. Pancotti, P. Rebentrost, N. Wiebe, and S. Lloyd, “Quantum machine learning,” _Nature_ , vol. 549, no. 7671, p. 195, 2017\.
  * [12] A. Bocharov, M. Roetteler, and K. M. Svore, “Efficient synthesis of universal repeat-until-success quantum circuits,” _Physical review letters_ , vol. 114, no. 8, p. 080502, 2015.
  * [13] S. Bravyi, D. Gosset, and R. König, “Quantum advantage with shallow circuits,” _Science_ , vol. 362, no. 6412, pp. 308–311, 2018.
  * [14] D. Camps and R. Van Beeumen, “Approximate quantum circuit synthesis using block encodings,” _Physical Review A_ , vol. 102, no. 5, p. 052411, 2020\.
  * [15] A. Chakrabarti, S. Sur-Kolay, and A. Chaudhury, “Linear nearest neighbor synthesis of reversible circuits by graph partitioning,” _arXiv preprint arXiv:1112.0564_ , 2011.
  * [16] J. Cheng, H. Deng, and X. Qian, “Accqoc: Accelerating quantum optimal control based pulse generation,” in _47th ACM/IEEE Annual International Symposium on Computer Architecture, ISCA 2020, Valencia, Spain, May 30 - June 3, 2020_. IEEE, 2020, pp. 543–555. [Online]. Available: https://doi.org/10.1109/ISCA45697.2020.00052
  * [17] R. Cleve, A. Ekert, C. Macchiavello, and M. Mosca, “Quantum algorithms revisited,” _Proceedings of the Royal Society of London. Series A: Mathematical, Physical and Engineering Sciences_ , vol. 454, no. 1969, pp. 339–354, 1998.
  * [18] A. Cowtan, S. Dilkes, R. Duncan, W. Simmons, and S. Sivarajah, “Phase gadget synthesis for shallow circuits,” _arXiv preprint arXiv:1906.01734_ , 2019\.
  * [19] A. Cross, “The IBM Q experience and QISKit open-source quantum computing software,” _Bulletin of the American Physical Society_ , vol. 63, 2018.
  * [20] S. A. Cuccaro, T. G. Draper, S. A. Kutin, and D. P. Moulton, “A new quantum ripple-carry addition circuit,” _arXiv preprint quant-ph/0410184_ , 2004\.
  * [21] M. G. Davis, E. Smith, A. Tudor, K. Sen, I. Siddiqi, and C. Iancu, “Towards optimal topology aware quantum circuit synthesis,” in _2020 IEEE International Conference on Quantum Computing and Engineering (QCE)_ , 2020, pp. 223–234.
  * [22] C. M. Dawson and M. A. Nielsen, “The solovay-kitaev algorithm,” _arXiv preprint quant-ph/0505030_ , 2005.
  * [23] A. De Vos and S. De Baerdemacker, “Block-z x z synthesis of an arbitrary quantum circuit,” _Physical Review A_ , vol. 94, no. 5, p. 052317, 2016.
  * [24] O. Di Matteo and M. Mosca, “Parallelizing quantum circuit synthesis,” _Quantum Science and Technology_ , vol. 1, no. 1, p. 015003, 2016.
  * [25] Y. Ding, X.-C. Wu, A. Holmes, A. Wiseth, D. Franklin, M. Martonosi, and F. T. Chong, “Square: Strategic quantum ancilla reuse for modular quantum programs via cost-effective uncomputation,” in _ACM/IEEE 47th Annual International Symposium on Computer Architecture (ISCA)_ , 2020.
  * [26] D. P. DiVincenzo, “Two-bit gates are universal for quantum computation,” _Physical Review A_ , vol. 51, no. 2, p. 1015, 1995.
  * [27] E. Farhi, J. Goldstone, and S. Gutmann, “A quantum approximate optimization algorithm,” _arXiv preprint arXiv:1411.4028_ , 2014.
  * [28] C. Gidney and D. Bacon, “The cirq developers, quantumlib/-cirq: A python framework for creating, editing, and invoking noisy intermediate scale quantum (nisq) circuits.”
  * [29] B. Giles and P. Selinger, “Exact synthesis of multiqubit clifford+ t circuits,” _Physical Review A_ , vol. 87, no. 3, p. 032332, 2013.
  * [30] S. J. Glaser, U. Boscain, T. Calarco, C. P. Koch, W. Köckenberger, R. Kosloff, I. Kuprov, B. Luy, S. Schirmer, T. Schulte-Herbrüggen _et al._ , “Training schrödinger’s cat: quantum optimal control,” _The European Physical Journal D_ , vol. 69, no. 12, pp. 1–24, 2015.
  * [31] P. Gokhale, Y. Ding, T. Propson, C. Winkler, N. Leung, Y. Shi, D. I. Schuster, H. Hoffmann, and F. T. Chong, “Partial compilation of variational algorithms for noisy intermediate-scale quantum machines,” in _Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture_ , 2019, pp. 266–278.
  * [32] P. Gokhale, A. Javadi-Abhari, N. Earnest, Y. Shi, and F. T. Chong, “Optimized quantum compilation for near-term algorithms with openpulse,” _arXiv preprint arXiv:2004.11205_ , 2020.
  * [33] “A Preview of Bristlecone, Google’s New Quantum Processor,” https://ai.googleblog.com/2018/03/a-preview-of-bristlecone-googles-new.html, accessed: 2020-10-09.
  * [34] D. Große, R. Wille, G. W. Dueck, and R. Drechsler, “Exact multiple-control toffoli network synthesis with sat techniques,” _IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems_ , vol. 28, no. 5, pp. 703–715, 2009.
  * [35] M. Heyl, A. Polkovnikov, and S. Kehrein, “Dynamical quantum phase transitions in the transverse-field ising model,” _Physical review letters_ , vol. 110, no. 13, p. 135704, 2013.
  * [36] “IBM Announces Advances to IBM Quantum Systems and Ecosystem,” https://www-03.ibm.com/press/us/en/pressrelease/53374.wss, accessed: 2020-10-09.
  * [37] “IBM Quantum Experience,” https://quantum-computing.ibm.com/, accessed: 2020-11-15.
  * [38] T. Itoko, R. Raymond, T. Imamichi, and A. Matsuo, “Optimization of quantum circuit mapping using gate transformation and commutation,” _Integration_ , vol. 70, pp. 43–50, 2020.
  * [39] A. JavadiAbhari, S. Patil, D. Kudrow, J. Heckey, A. Lvov, F. T. Chong, and M. Martonosi, “ScaffCC: Scalable compilation and analysis of quantum programs,” _Parallel Computing_ , vol. 45, pp. 2–17, 2015.
  * [40] R. Jozsa, “Quantum factoring, discrete logarithms, and the hidden subgroup problem,” _Computing in science & engineering_, vol. 3, no. 2, p. 34, 2001\.
  * [41] A. Kandala, A. Mezzacapo, K. Temme, M. Takita, M. Brink, J. M. Chow, and J. M. Gambetta, “Hardware-efficient variational quantum eigensolver for small molecules and quantum magnets,” _Nature_ , vol. 549, no. 7671, p. 242, 2017\.
  * [42] V. Kliuchnikov, D. Maslov, and M. Mosca, “Fast and efficient exact synthesis of single qubit unitaries generated by clifford and t gates,” _arXiv preprint arXiv:1206.5236_ , 2012.
  * [43] A. Kole, K. Datta, and I. Sengupta, “A heuristic for linear nearest neighbor realization of quantum circuits by SWAP gate insertion using N-gate lookahead,” _IEEE Journal on Emerging and Selected Topics in Circuits and Systems_ , vol. 6, no. 1, pp. 62–72, 2016.
  * [44] G. Li, Y. Ding, and Y. Xie, “Tackling the qubit mapping problem for nisq-era quantum devices,” in _Proceedings of the Twenty-Fourth International Conference on Architectural Support for Programming Languages and Operating Systems_ , 2019, pp. 1001–1014.
  * [45] A. P. Lund, M. J. Bremner, and T. C. Ralph, “Quantum sampling problems, bosonsampling and quantum supremacy,” _npj Quantum Information_ , vol. 3, no. 1, pp. 1–8, 2017.
  * [46] A. Lye, R. Wille, and R. Drechsler, “Determining the minimal number of swap gates for multi-dimensional nearest neighbor quantum circuits,” in _The 20th Asia and South Pacific Design Automation Conference_. IEEE, 2015, pp. 178–183.
  * [47] E. A. Martinez, T. Monz, D. Nigg, P. Schindler, and R. Blatt, “Compiling quantum algorithms for architectures with multi-qubit gates,” _New Journal of Physics_ , vol. 18, no. 6, p. 063029, 2016.
  * [48] D. Maslov, S. M. Falconer, and M. Mosca, “Quantum circuit placement,” _IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems_ , vol. 27, no. 4, pp. 752–763, 2008.
  * [49] N. Moll, P. Barkoutsos, L. S. Bishop, J. M. Chow, A. Cross, D. J. Egger, S. Filipp, A. Fuhrer, J. M. Gambetta, M. Ganzhorn _et al._ , “Quantum optimization using variational algorithms on near-term quantum devices,” _Quantum Science and Technology_ , vol. 3, no. 3, p. 030503, 2018.
  * [50] A. B. Nagy, “On an implementation of the solovay-kitaev algorithm,” _arXiv preprint quant-ph/0606077_ , 2006.
  * [51] M. A. Nielsen and I. Chuang, “Quantum computation and quantum information,” 2002\.
  * [52] P. Niemann, R. Wille, and R. Drechsler, “Improved synthesis of clifford+ t quantum functionality,” in _2018 Design, Automation & Test in Europe Conference & Exhibition (DATE)_. IEEE, 2018, pp. 597–600.
  * [53] P. Niemann, R. Wille, and R. Drechsler, “Advanced exact synthesis of clifford+ t circuits,” _Quantum Information Processing_ , vol. 19, no. 9, pp. 1–23, 2020.
  * [54] S. Nishio, Y. Pan, T. Satoh, H. Amano, and R. Van Meter, “Extracting success from ibm’s 20-qubit machines using error-aware compilation,” _arXiv preprint arXiv:1903.10963_ , 2019.
  * [55] A. Peruzzo, J. McClean, P. Shadbolt, M.-H. Yung, X.-Q. Zhou, P. J. Love, A. Aspuru-Guzik, and J. L. O’brien, “A variational eigenvalue solver on a photonic quantum processor,” _Nature Communications_ , vol. 5, p. 4213, 2014\.
  * [56] J. Preskill, “Quantum computing in the NISQ era and beyond,” _Quantum_ , vol. 2, p. 79, 2018.
  * [57] M. Saeedi, R. Wille, and R. Drechsler, “Synthesis of quantum circuits for linear nearest neighbor architectures,” _Quantum Information Processing_ , vol. 10, no. 3, pp. 355–377, 2011.
  * [58] V. V. Shende, S. S. Bullock, and I. L. Markov, “Synthesis of quantum-logic circuits,” _IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems_ , vol. 25, no. 6, pp. 1000–1010, 2006.
  * [59] Y. Shi, N. Leung, P. Gokhale, Z. Rossi, D. I. Schuster, H. Hoffmann, and F. T. Chong, “Optimized compilation of aggregated instructions for realistic quantum computers,” in _Proceedings of the Twenty-Fourth International Conference on Architectural Support for Programming Languages and Operating Systems_ , 2019, pp. 1031–1044.
  * [60] D. Shin, H. Hübener, U. De Giovannini, H. Jin, A. Rubio, and N. Park, “Phonon-driven spin-floquet magneto-valleytronics in mos 2,” _Nature communications_ , vol. 9, no. 1, pp. 1–8, 2018.
  * [61] P. W. Shor, “Polynomial-time algorithms for prime factorization and discrete logarithms on a quantum computer,” _SIAM review_ , vol. 41, no. 2, pp. 303–332, 1999.
  * [62] M. Y. Siraichi, V. F. d. Santos, S. Collange, and F. M. Q. Pereira, “Qubit allocation,” in _Proceedings of the 2018 International Symposium on Code Generation and Optimization_ , 2018, pp. 113–125.
  * [63] M. Y. Siraichi, V. F. d. Santos, S. Collange, and F. M. Q. Pereira, “Qubit allocation,” in _Proceedings of the 2018 International Symposium on Code Generation and Optimization_ , 2018, pp. 113–125.
  * [64] S. Sivarajah, S. Dilkes, A. Cowtan, W. Simmons, A. Edgington, and R. Duncan, “t— ket¿: A retargetable compiler for nisq devices,” _Quantum Science and Technology_ , 2020.
  * [65] R. R. Tucci, “An introduction to cartan’s kak decomposition for qc programmers,” _arXiv preprint quant-ph/0507171_ , 2005.
  * [66] R. Wille, M. Haghparast, S. Adarsh, and M. Tanmay, “Towards hdl-based synthesis of reversible circuits with no additional lines,” in _2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)_. IEEE, 2019, pp. 1–7.
  * [67] R. Wille, O. Keszocze, M. Walter, P. Rohrs, A. Chattopadhyay, and R. Drechsler, “Look-ahead schemes for nearest neighbor optimization of 1D and 2D quantum circuits,” in _2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC)_. IEEE, 2016, pp. 292–297.
  * [68] R. Wille, A. Lye, and R. Drechsler, “Optimal SWAP gate insertion for nearest neighbor quantum circuits,” in _2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC)_. IEEE, 2014, pp. 489–494.
  * [69] X.-C. Wu, D. M. Debroy, Y. Ding, J. M. Baker, Y. Alexeev, K. R. Brown, and F. T. Chong, “Tilt: Achieving higher fidelity on a trapped-ion linear-tape quantum computing architecture,” 2020.
  * [70] E. Younis, K. Sen, K. Yelick, and C. Iancu, “Qfast: Quantum synthesis using a hierarchical continuous circuit space,” _arXiv preprint arXiv:2003.04462_ , 2020.
  * [71] A. Zulehner, A. Paler, and R. Wille, “Efficient mapping of quantum circuits to the ibm qx architectures,” in _2018 Design, Automation & Test in Europe Conference & Exhibition_. IEEE, 2018, pp. 1135–1138.


[a]M. Borchiellini

# The role of electron capture decay in the precision era of Galactic cosmic-
ray data

D. Maurin  M. Vecchi

###### Abstract

Electron capture (EC) decay relies on attachment and stripping cross-sections,
that in turn, depend on the atomic number of the nucleus. We revisit the
impact of EC decay in the context of the high-precision cosmic-ray fluxes
measured by the AMS-02 experiment. We derive the solution of the steady-state
fluxes in a 1D thin disk model including EC decay. We compare our results with
relevant elemental and isotopic fluxes and evaluate the impact of this
process, given the precision of recent AMS-02, ACE-CRIS, SuperTIGER, and
Voyager data. We find this impact to be at the level or larger than the
precision of recently collected data for several species, e.g. 31Ga and 33As,
indicating that EC decay must be properly taken into account in the
calculation.

##  1 Introduction

The study of Galactic Cosmic Rays (GCRs) can provide information not only on
their propagation and the properties of their sources but also on new physics
phenomena in the Universe (e.g. dark matter). Direct measurements currently
provide high-precision data on GCR fluxes and the isotopic composition of
heavy elements: AMS-02 measured GCR top-of-atmosphere (TOA) fluxes from H up
to Si and Fe, at $\sim 2~{}{\rm GV}-2$ TV, with unprecedented precision [1],
SuperTIGER released TOA elemental ratios at 3.1 GeV/n for $26\leq Z\leq 40$
[2], whereas Voyager published interstellar (IS) fluxes at $\sim 50-200$ MeV/n
for H to Ni [3]; ACE-CRIS also recently extended the measurements of the TOA
isotopic composition at a few hundred of MeV/n for elements $29<Z<38$ [4].

For this reason, it becomes increasingly important to model the processes that
contribute to GCR transport as accurately as possible to obtain models for GCR
fluxes precise enough to compare them with the available data and search for
new (astro)physics phenomena. One process that has not been often discussed in
the literature is electron capture (EC) decay, which has been interpreted in
the context of the leaky-box model in [5]. It consists of the decay of a
nuclide after the capture of a K-shell electron. Hence it does not occur
freely in the Interstellar Medium (ISM), since GCRs are usually fully ionised.
This implies that the effectiveness of EC decay depends heavily on the cross
sections for attachment and stripping of electrons for the different GCR
nuclei, hence on their atomic numbers, but also on their decay time which
ranges from ms to Myr. In particular, a higher impact of EC decay is expected
for heavy GCRs [6].

This work aims to assess the impact of EC decay in the context of the high-
precision GCR elemental fluxes measured by the ACE-CRIS, AMS-02, SuperTIGER,
and Voyager experiment, and the isotopic ratios measured by ACE-CRIS. In Sect.
2, we discuss the general framework for GCR transport and the methods used in
this analysis. In Sect. 3, we present our results, while in Sect. 4, we
summarise our findings.

##  2 Methodology

The transport of GCRs is described by a diffusion-advection equation which has
been extensively discussed in [7]. The differential density $n_{\alpha}$ of a
GCR species $\alpha$ is given by

$\begin{split}-\vec{\nabla}_{\textbf{x}}\left\\{D(E)\vec{\nabla}_{\textbf{x}}n_{\alpha}-\vec{V}_{c}n_{\alpha}\right\\}+&\frac{\partial}{\partial
E}\left\\{b_{\rm tot}(E)n_{\alpha}-\beta^{2}K_{pp}\frac{\partial
n_{\alpha}}{\partial E}\right\\}+\sigma_{\alpha}^{\rm
inel}\,v_{\alpha}\,n_{\rm ISM}\,n_{\alpha}\,+\Gamma_{\alpha}\,n_{\alpha}\,\\\
&=q_{\alpha}\,+\sum_{\beta>\alpha}\left\\{\sigma_{\beta\rightarrow\alpha}\,v_{\beta}\,n_{\rm
ISM}\,+\Gamma_{\beta\rightarrow\alpha}\right\\}n_{\beta}\,,\end{split}$ (1)

where the source term (right-hand side of the equation) is given by a primary
injection rate $q_{\alpha}$, and a secondary injection rate from inelastic
interactions of heavier species $\beta$ on the ISM (production cross-section
$\sigma_{\beta\rightarrow\alpha}$) or from nuclear decay (rate
$\Gamma_{\beta\rightarrow\alpha}$). The other terms are, respectively, from
left to right: the diffusion coefficient $D$ describing the scattering of CRs
off magnetic turbulence, which depends on the rigidity $R=pc/Ze$; the galactic
wind $V_{c}$; the rate for energy losses $b_{\rm tot}(E)\equiv dE/dt$ that
includes ionisation and Coulomb processes as well as adiabatic losses induced
by convection; the energy-dependent coefficient $K_{pp}$ used to model
reacceleration; the rate of inelastic interactions on gas
$\sigma_{\alpha}^{\rm inel}\,v_{\alpha}\,n_{\rm ISM}$ and the nuclear decay
rate $\Gamma_{\alpha}$.

In this work, we incorporate in Eq. (1) electron capture nuclides by treating
the different charge states separately, following [6]. In this preliminary
analysis, to study the interplay between the different processes analytically,
we neglect energy losses, and we also neglect convection for simplicity. We
perform our calculations in the two-zone (thin disk/thick halo) 1D propagation
model, as used, for instance, in [7], in which GCR fluxes only depend on the
vertical coordinate $z$. The ISM gas (with density $n_{\rm ISM}$) and
astrophysical sources are localised in a thin disc of half-height $h=0.1$ kpc,
and the thin disc is embedded in a thick halo, where GCR are confined, and
they diffuse by scattering on magnetic fields irregularities. The halo is
modelled as a slab in the radial direction with half-height $L=5$ kpc, and the
observer is located at $z=0$. For practical calculations, we model the
diffusion coefficient as a power law with breaks both at low and high
rigidities [7], and the parameter values are taken from the combined analysis
[8] of AMS-02 Li/C, Be/C, and B/C data.

In this geometry and with the above approximations, the steady-state transport
equation for an EC-unstable species takes the form of the following system of
two coupled equations:

$\begin{cases}-D(E)\,\partial^{2}_{z}n_{0}+2h\delta(z)\biggr{\\{}\Gamma^{\rm
inel}n_{0}+\Gamma^{a}n_{0}-\Gamma^{\rm
strip}n_{1}\biggr{\\}}=2h\delta(z)q\,;\\\
-D(E)\,\partial^{2}_{z}n_{1}+2h\delta(z)\biggr{\\{}\Gamma^{\rm
inel}n_{1}+\Gamma^{\rm strip}n_{1}-\Gamma^{\rm
att}n_{0}\biggr{\\}}+\Gamma^{\rm EC}n_{1}=0\,.\end{cases}$ (2)

These two equations describe the spatial and energy evolution of the
differential density of the fully ionised GCR ($n_{0}$) and the same GCR with
one electron attached ($n_{1}$). The transition from one state to another is
described by the electron stripping and attachment rates, denoted $\Gamma^{\rm
strip}=n_{\rm ISM}\,v\,\sigma_{\rm strip}$ and $\Gamma^{\rm att}=n_{\rm
ISM}\,v\,\sigma_{\rm att}$ respectively; we take the cross-section
parametrisations $\sigma_{\rm att}$ and $\sigma_{\rm strip}$ from [6]. We
assume here that higher charge states are almost not populated [6], and in
order to have a close system (constant number density of the species
considered), we do not allow $n_{1}$ to attach electrons. As EC-unstable
species decay by capturing a K-shell electron, the EC decay rate, $\Gamma^{\rm
EC}=1/(\tau_{\rm EC}\,\gamma)$, is implemented for $n_{1}$ only.

Process | Timescale | Dependencies
---|---|---
Diffusion | $t_{D}=\dfrac{L^{2}}{2D}$ | $D\propto E^{0.5}$
Inelastic scattering | $t_{\rm inel}=\dfrac{1}{n_{\rm ISM}\,v\,\sigma_{\rm inel}}$ | $\sigma_{\rm inel}\propto A^{2/3}$
Attachment | $t_{\rm att}=\dfrac{1}{n_{\rm ISM}\,v\,\sigma_{\rm att}}$ | $\sigma_{\rm att}\propto\sigma(E)Z^{2}$
Stripping | $t_{\rm strip}=\dfrac{1}{n_{\rm ISM}\,v\,\sigma_{\rm strip}}$ | $\sigma_{\rm strip}\propto\sigma(E)Z^{-2}$
EC decay | $t_{\rm EC}=\tau_{\rm EC}\,\gamma$ | $t_{\rm EC}\propto E$
Table 1: The five competing processes that have been taken into account to
model GCR propagation, with their corresponding timescales and dependencies.

##  3 Results

###  3.1 Timescales

Before showing the solutions of Eq. (2), it is interesting to discuss the
timescales in our 1D model since their interplay affects the final isotopic
and elemental fluxes. Five propagation processes have been considered, as
reported in Table 1, where we highlight the main dependencies on energy or
atomic number.

Figure 1: Timescales for the processes listed in Table 1 as a function of
kinetic energy per nucleon, for the species ${}_{4}^{7}$Be with
$t_{1/2}=1.46\;10^{-7}$ Myr (left panel) and ${}^{205}_{82}$Pb with
$t_{1/2}=1.4\;10^{7}$ Myr (right panel).

The associated timescales are shown in Fig. 1 as a function of the kinetic
energy per nucleon, for ${}_{4}^{7}$Be (left panel) and ${}^{205}_{82}$Pb
(right panel); these two species are representative of light and heavy EC
decaying nuclides respectively.

First, we recover the standard result (e.g. [9]) that diffusion dominates at
high energy (smallest timescale), while inelastic scattering is relevant
mostly at low energies, especially for heavy nuclei. Then, for EC decay to
dominate over the other propagation processes, a first condition is that
$t_{\rm EC}$ (orange dotted lines) has to be lower than $t_{D}$ (blue solid
lines) and $t_{\rm inel}$ (green dashed lines), which is always more likely to
happen at low energy, as $t_{\rm EC}\propto E$, while $t_{D}\propto
1/\sqrt{E}$ and $t_{\rm inel}$ is roughly constant. However, the net effect of
EC decay also relies on the interplay between attachment (magenta dash-dotted
lines) and stripping processes (red dash-dotted lines), which depend on the
kinetic energy and the atomic number through their cross-sections: as seen
from Fig. 1, attachment only overcomes stripping for low energy and heavy
nuclei, as $t_{\rm att}\propto Z^{2}$ while $t_{\rm strip}\propto Z^{-2}$. As
a result, the impact of EC decay will depend on the specific ordering of these
three times, and a species will disappear via EC decay only if both $t_{\rm
att}\lesssim t_{D}$ and $t_{\rm EC}\lesssim(t_{D},t_{\rm strip})$.

###  3.2 Impact of EC decay on isotopic and elemental fluxes

We solve the coupled system of Eq. (2) following [10], and we obtain for the
differential density at $z=0$:

$\begin{cases}n_{1}=\dfrac{\Gamma^{\rm
att}n_{0}}{\sqrt{\dfrac{D(E)\,\Gamma^{\rm
EC}}{h^{2}}}\,\coth\left(\sqrt{\dfrac{\Gamma^{EC}}{D(E)}}L\right)+\Gamma^{\rm
inel}+\Gamma^{\rm strip}}\;;\\\ n_{0}=\dfrac{q}{\dfrac{D(E)}{hL}+\Gamma^{\rm
inel}+\Gamma^{\rm att}-\Gamma^{\rm strip}\Gamma^{\rm
att}\left[\sqrt{\dfrac{D(E)\,\Gamma^{\rm
EC}}{h^{2}}}\,\coth\left(\sqrt{\dfrac{\Gamma^{\rm
EC}}{D(E)}}L\right)+\Gamma^{\rm inel}+\Gamma^{\rm
strip}\right]^{-1}}\;.\end{cases}$ (3)

Figure 2: Fraction $n_{0}/(n_{0}+n_{1})$ of GCRs that do not attach an
electron, where $n_{0}$ and $n_{1}$ are defined in Eq. (3). Different values
of $Z$ are shown as different shades of blue and line thicknesses.

Since the balance between attachment and stripping plays such a critical role
in the effectiveness of EC decay, in Fig. 2 we examine, disregarding EC decay
(i.e. considering $\tau_{\rm EC}\to\infty$ in Eq. 3), the fraction of GCRs
that do not attach an electron ($n_{0}$) with respect to the total number
density ($n_{0}+n_{1}$), for growing elements $Z$ (from thin to thick lines).
The above conclusions from the study of characteristic timescales can explain
the trend shown by the different lines: no electrons are attached above a few
GeV/n, coherently with a scenario in which $t_{\rm att}\gg t_{D}$; secondly,
heavier GCRs attach more electrons than light GCRs due to the interplay
between stripping and attachment cross sections. Overall, the fraction of
attached electrons is at most $\gtrsim 0.5$ for $Z\leq 40$ at $E_{k/n}\sim 10$
MeV/n.

Taking into account the half-life of EC-unstable species, we can now evaluate
the impact of EC decay on the relevant isotopes and associated elements. We
selected a subset of species $Z\leq 40$ with both short and intermediate half-
lives, which are listed in Table 2. These values have been used to compute the
final isotopic and elemental abundances and derive the results presented in
Fig. 3. The top panel of Fig. 3 shows the percentage of GCR isotopes that
decay by EC. Unsurprisingly, EC decay has no impact on isotopic fluxes above a
few GeV/n per nucleon. At lower $E_{k/n}$, there is almost no visible effect
for intermediate-lived isotopes (orange dashed lines), while short-lived GCRs
(solid blue lines) exhibit different behaviours depending on their atomic
number. In particular, the heavier nuclei (${}^{67}_{31}$Ga and
${}^{73}_{33}$As) decay almost completely below 100 MeV/n.

Isotope |  $t_{1/2}$ (Myr) | Isotopic fraction
---|---|---
${}^{7}_{4}$Be | 1.46 $10^{-7}$ | 0.55
${}^{37}_{18}$Ar | 9.58 $10^{-8}$ | 0.30
${}^{41}_{20}$Ca | 1.00 $10^{-1}$ | 0.07
${}^{44}_{22}$Ti | 4.70 $10^{-5}$ | 0.04
${}^{53}_{25}$Mn | 3.70 | 0.35
${}^{67}_{31}$Ga | 8.93 $10^{-9}$ | 0.07
${}^{73}_{33}$As | 2.20 $10^{-7}$ | 0.36
Table 2: Sample of EC-unstable GCRs $Z\leq 40$, with their EC half lives [6]
and GCR isotopic fractions at low energy (from data extracted from the CR Data
Base [11]).

Figure 3: Decaying fraction of a sample of EC-unstable species in GCR isotopic
fluxes (top) and associated elemental fluxes (bottom) computed as $(n^{\rm
EC}-n^{\rm noEC})/n^{\rm noEC}$, where $n=n_{0}+n_{1}$ from Eq. (3) with
($n^{\rm EC}$) and without ($n^{\rm noEC}$) the EC decay term. In the bottom
panel, the abundances of the different isotopes have been weighted by their
isotopic GCR fractions. The shaded areas correspond to the precision (right-
hand side axis) and energy range of recent experimental data.

It is interesting to compare the impact of EC decay (observed in our
simplified model) to the precision of recent data — we recall that the flux
$J$ is related to the differential density $n$ by $J=vn/(4\pi)$, so that the
relative differences (considered below) on $n$ and $J$ are one and the same.
Experimentally, light nuclei are more abundant than heavier ones, with a
strong suppression of elements heavier than Fe. For this reason, light
isotopes have been measured with better precision. However, light EC-unstable
isotopes are rare, and because of the large attachment time for light nuclei,
the abundance of ${}^{7}_{4}$Be (thinnest blue line in the top panel of Fig.
3) does not show any change with respect to a model without EC decay.
Abundances for GCR isotopes in the range $Z=15-40$ have been measured by the
ACE-CRIS experiment [4, 12]. Their precision is dominated by statistical
uncertainties and strongly isotope-dependent: at a few hundreds of MeV/n it
has a typical value $\lesssim 10\%$ for $Z=15-30$, reaching a precision
$\lesssim 50\%$ for $Z=30-40$. We predict the impact of EC decay on
${}^{37}_{18}$Ar flux to be $\geq 10\%$ for $E_{k/n}\lesssim 400$ MeV/n, which
is higher than ACE-CRIS precision for the same isotope and energy range. On
the other hand, the precision for ACE-CRIS on ${}^{67}_{31}$Ga and
${}^{73}_{33}$As for at a few MeV/n is $\sim 50\%$, of the order of the impact
of EC decay on the modelled fluxes at the same energies (in practice, Solar
modulation shifts data TOA energy towards higher IS ones, i.e. energies with
even smaller EC impact in our IS calculations).

The impact of EC-decay on elemental fluxes is shown in the bottom panel of
Fig. 3. This impact is calculated by assuming EC-unstable species constitute a
fraction of the elemental flux. In practice, we set this isotopic fraction to
a constant value with energy based on the GCR measured one; the associated
numbers are reported in Table 1. The impact of EC-decay is thus diluted in the
elemental fluxes, but the latter are easier to measure than isotopic ones due
to intrinsic experimental challenges in isotopic separation. AMS-02 has
already published the elemental flux of all species from H to S and Fe, and
the flux of He isotopes, with a precision reaching at best a few percent [1],
for energies typically $\gtrsim 500$ MeV/n. At these energies, the impact on
18Ar is slightly larger than the expected AMS-02 data precision for its flux.
The precision for 22Ti Voyager data is $\sim 20\%$ between $100$ and $200$
MeV/n, of the order of the impact of EC decay on the same elemental flux in
that energy range. The impact of EC decay on 31Ga and 33As fluxes for
$E_{k/n}\sim 100$ MeV/n correspond to the value of the whole isotopic fraction
($\sim 7\%$ and $\sim 36\%$, respectively), since the corresponding EC-
unstable isotopes fully decay at low energies per nucleon. SuperTIGER
precision, on the other hand, is $\sim 16\%$ for 31Ga and $\sim 18\%$ for 33As
at $E_{k/n}$ above $700$ MeV/n, where the impact of EC decay is already
strongly suppressed. The precision of ACE-CRIS measurements for 31Ga and 33As
abundances at a few hundreds of MeV/n is at most of the order of the impact of
EC decay on the same elemental fluxes, with values of $\sim 7\%$ and $\sim
28\%$ for 31Ga and 33As respectively.

##  4 Conclusions

In the context of recent high-precision data, we have revisited the impact of
EC-decay on GCR fluxes. In a 1D diffusion model with parameters tuned to
recent secondary-to-primary data, we found that EC decay impacts isotopic
fluxes at most at the level of $\lesssim 50\%$ at a few hundreds of MeV/n, and
$\lesssim 20\%$ for elemental fluxes in the same energy range.

These numbers are of the order of ACE-CRIS precision for isotopic fluxes and
slightly larger than AMS-02 precision for elemental fluxes. The impact of EC
decay at very low energies is of the same order of Voyager precision for 22Ti
flux, while at energies higher than $700$ MeV/n it is lower than SuperTIGER
precision for elemental abundances. Overall, this shows that this effect has
to be taken properly into account in the calculation.

The analysis presented here will be improved in several directions. First, the
analytical solution can be further exploited to assess whether the attachment
of several electrons needs to be taken into account. In particular, as
$Z\gtrsim 30$ data have so far been interpreted in a leaky-box model only, it
is important to compare the impact of EC decay in the leaky-box and in a more
realistic diffusion model. To do so, energy losses, Solar modulation, and the
full source terms and fragmentation terms need to be accounted for, and we are
implementing species $Z>30$ in the USINE code [13].

## References

  * [1] M. Aguilar, L. Ali Cavasonza, G. Ambrosi et al., Phys. Rept. 894 (2021) 1.
  * [2] R. P. Murphy, M. Sasaki, W. R. Binns et al., ApJ 831 (2016) 148.
  * [3] A. C. Cummings, E. C. Stone, B. C. Heikkila et al., ApJ 831 (2016) 18.
  * [4] W. R. Binns, M. E. Wiedenbeck, T. T. von Rosenvinge et al., ApJ 936 (2022) 13.
  * [5] J. R. Letaw, J. H. Adams Jr., R. Silberberg, and C. H. Tsao, Ap&SS 114 (1985) 365.
  * [6] J. R. Letaw, R. Silberberg, C. H. Tsao, ApJSS 56 (1984) 369.
  * [7] Y. Génolini, M. Boudaud, P. I. Batista et al., Phys. Rev. D 99 (2019) 123028.
  * [8] D. Maurin, E. Ferronato Bueno, Y. Génolini, L. Derome, and M. Vecchi, A&A 668 (2022) A7.
  * [9] L. Derome, D. Maurin, P. Salati et al., A&A 627 (2019) A158.
  * [10] D. Maurin, F. Donato, R. Taillet and P. Salati, ApJ 555 (2001) 585.
  * [11] D. Maurin, M. Ahlers, H. Dembinski et al., arXiv:2306.08901.
  * [12] R. C. Ogliore, E. C. Stone, R. A. Leske et al., ApJ 695 (2009) 666.
  * [13] D. Maurin, Comput. Phys. Commun. 247 (2020) 106942.