# Tail Asymptotics of the Signature of various stochastic processes and its
connection to the Quadratic Variation

Martin Albert Gbúr111University of Warwick, UK. This research has been funded
by the Undergraduate Research Support Scheme (URSS). The author is very
grateful to Horatio Boedihardjo for an interesting project, frequent meetings
and enlightening discussions. The author is also grateful to Tessy
Papavasiliou for introducing him to RPT and useful research ideas.

(Project supervisors: Horatio Boedihardjo and Anastasia Papavasiliou)

###### Abstract

The signature of a path is a sequence, whose $n$-th term contains $n$-th order
iterated integrals of the path. These iterated integrals of sample paths of
stochastic processes arise naturally when studying solutions of differential
equation driven by those processes. This paper extends the work of Boedihardjo
and Geng [BG19] who found a connection between the signature of
$d$-dimensional Brownian motion and the time elapsed, which equals to the
quadratic variation of Brownian motion. We prove this connection for a more
general class of processes, namely for Itô signature of semimartingales. We
also establish a connection between the fWIS Signature of fractional Brownian
motion and its Hurst parameter. We propose a conjecture for extension to
multidimensional space.

##  1 Introduction

###  1.1 Theoretical background

This is a very brief introduction to the Rough path theory introduced in
[Lyo98], roughly following Chapter 3 of [LCL07]. Let $V$ be a real Banach
space. Define the space of formal sequences of tensors by
$T((V))=\prod_{k=0}^{\infty}V^{\otimes k}$ and the truncated tensor algebra of
order $N$ by $T^{N}(V)=\bigoplus_{k=0}^{N}V^{\otimes k}$.

For a path $X:[0,T]\rightarrow V$ of finite $p$-variation for some $p<2$ we
define the signature of $X|_{[s,t]}$ as

$\displaystyle\mathbb{X}_{s,t}$
$\displaystyle=(1,\mathbb{X}_{s,t}^{1},\mathbb{X}_{s,t}^{2},\dots)\in
T((V))\hskip 28.45274pt\text{where}$ $\displaystyle\mathbb{X}_{s,t}^{n}$
$\displaystyle=\int_{s}^{t}\int_{s}^{u_{n}}\dots\int_{s}^{u_{2}}\text{d}X_{u_{1}}\otimes\dots\otimes\text{d}X_{u_{n-1}}\otimes\text{d}X_{u_{n}}$

and the integrals are defined in Young sense. In the case of a $d$-dimensional
Brownian motion ($V=\mathbb{R}^{d}$ with basis $e_{1},\dots,e_{d}$), we can
define the signature similarly, by letting

$\displaystyle\mathbb{B}_{s,t}^{n}:$ $\displaystyle=\sum_{1\leq
i_{1},\dots,i_{n}\leq
d}\mathbb{B}_{s,t}^{n,i_{1},\dots,i_{n}}e_{i_{1}}\otimes\dots\otimes
e_{i_{n}}\in(\mathbb{R}^{d})^{\otimes n}\hskip 28.45274pt\text{where}$
$\displaystyle\mathbb{B}_{s,t}^{n,i_{1},\dots,i_{n}}:$
$\displaystyle=\int_{s}^{t}\int_{s}^{u_{n}}\dots\int_{s}^{u_{2}}\text{d}X_{u_{1}}^{i_{1}}\dots\text{d}X_{u_{n-1}}^{i_{n-1}}\text{d}X_{u_{n}}^{i_{n}}$

However, as we’re no longer in the finite $p$-variation setting, there are
multiple ways of defining the integral (e.g. Itô, Stratonovich) resulting in
different objects.

Let $\Delta_{T}=\\{(s,t)\in[0,T]^{2}:0\leq s\leq t\leq T\\}$. If we truncate
the signature after its $n$-th term, we can view $\mathbb{X}$ as a map from
$\Delta_{T}$ to $T^{N}(V)$, where (1) $\mathbb{X}^{0}=1$ and Chen’s theorem
asserts that (2) $\mathbb{X}_{s,u}\otimes\mathbb{X}_{u,t}=\mathbb{X}_{s,t}$
for any $s\leq u\leq t\in[0,T]$. The Itô and Stratonovich signatures of
Brownian motion also share these two properties, and we call all such mappings
Multiplicative functionals. We can also extend the notion of $p$-variation to
these functionals by defining the metric

$\displaystyle d_{p}(\mathbb{X},\mathbb{Y})=\max_{1\leq i\leq
n}\sup_{0=t_{0}<t_{1}<\dots<t_{k}=T}\left(\sum_{0\leq j\leq
k-1}\|\mathbb{X}_{t_{j},t_{j+1}}^{i}-\mathbb{X}_{t_{j},t_{j+1}}^{i}\|_{V^{\otimes
i}}^{p/i}\right)^{i/p}$

where $n$ is the integer part of $p$ and the supremum is taken over all
partitions of $[0,T]$. We say that $\mathbb{X}$ has finite $p$-variation if
$d_{p}(\mathbb{X},1)<\infty$. This leads us to the definition of a $p$-rough
path as a degree $\lfloor p\rfloor$ multiplicative functional with finite
$p$-variation. Both Itô and Stratonovich signatures are $p$-rough paths for
any $p\in(2,3)$.

There is a famous theorem by T. Lyons [Lyo98], which states that any $p$-rough
path can be uniquely extended into a multiplicative functional on $T((V))$,
i.e. the signature of a finite $p$-variation path for $p\in(1,2)$ is the only
multiplicative functional with the desirable property that
$\mathbb{X}^{1}_{s,t}=X_{t}-X_{s}$. For Brownian motion, the choice is then
determined by the second term.

In statistical applications, we might want to infer properties of a process
driven by a rough input, from its observations in time (see e.g. [FLMS23] for
a concise overview). Since the signature arises naturally in describing
solutions to path-driven differential equations as Taylor expansions, it
should encode a lot of the properties we’re interested in. We would therefore
like to lift the driving process into a suitable rough path - such that if we
embed our observations into a path (continuous, of bounded variation) in some
appropriate way and compute its signature, this will provide us with a good
approximation of the rough path.

This motivates a class of rough paths called $p$-geometric rough paths defined
as the closure of the space of signatures of bounded variation paths under the
$p$-variation metric. In the case of Brownian motion, the Itô signature isn’t
a $p$-geometric rough path, but the Stratonovich signature is. Moreover, it
equals the limit of signature of the dyadic piecewise linear interpolations to
the Brownian sample path, and therefore we call it the cannonical lift.

###  1.2 Previous results

Since the signature encodes properties of a path, the natural question is, how
much information can we decode from the signature and if any properties get
lost in the transformation. For bounded variation paths, it was shown that the
signature determines a path up to tree-like equivalences [HL10], and a similar
result was proved for Brownian sample paths as well [LQ11]. It is therefore
natural to ask, whether we can recover the quadratic variation of a sample
path of a stochastic process from its signature. The following estimate on the
$p$-variation of a $p$-rough path $\mathbb{X}$ is known:

$\displaystyle\|\mathbb{X}^{n}\|_{\text{proj}}\leq\frac{C(\mathbb{X})^{n/p}}{(n/p)!},$
(1)

where $C(\mathbb{X})$ is a constant depending on the $p$-variation of
$\mathbb{X}$.

Let $V=\mathbb{R}^{d}$ and assume that $(B_{t})_{t\geq
0}=(B_{t}^{1},\dots,B_{t}^{d})_{t\geq 0}$ is a $d$-dimensional Brownian motion
with its cannonical lift into a $p$-geometric rough path $\mathbb{B}$ for
$2<p<3$. In view of (1) it is natural to study the quantity:

$\displaystyle
L^{\mathbb{B}}_{s,t}=\limsup_{n}\left\|\left(\frac{n}{2}\right)!\mathbb{B}_{s,t}^{n}\right\|_{n}^{\frac{2}{n}}$
(2)

where $(\|\cdot\|_{n})_{n}$ is an admissible sequence of norms:

  * •

$\|\cdot\|_{n}$ is a norm on $(\mathbb{R}^{d})^{\otimes n}$

  * •

for any $a\in(\mathbb{R}^{d})^{\otimes n}$ and $b\in(\mathbb{R}^{d})^{\otimes
m}$ we have $\|a\otimes b\|_{m+n}\leq\|a\|_{n}\|b\|_{m}$

  * •

for any permutation $\sigma$ on $\\{1,\dots n\\}$, let $P_{\sigma}$ be a
linear operator which sends $v_{1}\otimes\dots\otimes v_{n}$ into
$v_{\sigma(1)}\otimes\dots\otimes v_{\sigma(n)}$ and then we have for any
$a\in(\mathbb{R}^{d})^{\otimes n}$ that $\|P_{\sigma}a\|_{n}=\|a\|_{n}$

One example of such sequence of norms is the projective norm:

$\displaystyle\|a\|_{n,\text{proj}}:=\inf\left\\{\sum_{l}|v_{1}^{l}|_{\mathbb{R}^{d}}\dots|v_{n}^{l}|_{\mathbb{R}^{d}}\text{
when }a=\sum_{l}v_{1}^{l}\otimes\dots\otimes v_{n}^{l}\right\\}$

which depends on the choice of norm on $\mathbb{R}^{d}$. In the case of
$l^{1}$ we would get

$\displaystyle\|\mathbb{B}_{s,t}^{n}\|_{n,l^{1}}=\sum_{i_{1},\dots,i_{n}=1}^{d}|\mathbb{B}_{s,t}^{n,i_{1},\dots,i_{n}}|,$

which coincides with the $l^{1}$ norm on $(\mathbb{R}^{d})^{\otimes n}$.
Another admissible norm is $l^{2}$, under which

$\displaystyle\|\mathbb{B}_{s,t}^{n}\|_{n,l^{2}}=\left(\sum_{i_{1},\dots,i_{n}=1}^{d}|\mathbb{B}_{s,t}^{n,i_{1},\dots,i_{n}}|^{2}\right)^{1/2}$

and then $(\mathbb{R}^{d})^{\otimes n}$ is a Hilbert space.

In [BG19] it was proved that with the set up as above, we have:

######  Theorem 1.1.

Let $(B_{t})_{t\geq 0}=(B_{t}^{1},\dots,B_{t}^{d})_{t\geq 0}$ be a
$d$-dimensional Brownian motion, $(\|\cdot\|_{n})_{n}$ an admissible sequence
of norms and $L^{\mathbb{B}}_{s,t}$ defined as in (2). If each element of the
canonical basis $\\{e_{1},\dots,e_{d}\\}$ of $\mathbb{R}^{d}$ has norm one
with respect to $\|\cdot\|$, then there exists a deterministic constant
$\kappa_{d}$ depending on dimension $d$ and the choice of norms, such that
almost surely:

$\displaystyle L^{\mathbb{B}}_{s,t}=\kappa_{d}(t-s)\hskip 28.45274pt\forall
s<t$

Moreover, we have the upper estimate $\kappa_{d}\leq d^{2}$, and under the
$l^{p}$ norm on $\mathbb{R}^{d}$ ($p\in[1,2]$) and the associated projective
tensor norms $(\|\cdot\|_{n})_{n}$ we have the lower estimate
$\kappa_{d}\geq(d-1)/2$

The aim of this paper is to extend this result by considering a wider class of
integrator, different admissible norms, and prove similar results for the Itô
signature.

###  1.3 The plan of the paper

In section 2 we first focus on one-dimensional iterated Itô integrals and we
use asymptotic behaviour of Hermite polynomials to get an exact formula for
this limit.

This approach is then further explored in section 3, where thanks to the
connections between Hermite polynomials and Wiener integrals, we can extend
this to the fractional Brownian Motion case and formulate an explicit relation
between the Hurst parameter $H$ and its iterated fWIS integrals.

Finally, we describe our endeavour to generalise our results into multiple
dimensions in section 4, which we spent the most time working on, but due to
significant difficulties we were able to show very little. We comment on our
approaches and describe where this work could be taken further.

##  2 Main result

First recall some basic facts from stochastic analysis, following the
reference [Kle20]:

Fix a filtered probability space $(\Omega,{F},({F}_{t})_{t\geq
0},\mathbb{P})$. A real valued process $(X_{t})_{t\geq 0}$ adapted to
$({F}_{t})_{t\geq 0}$ is called a continuous semimartingale if it can be
decomposed into $X_{t}=M_{t}+A_{t}$, where $(M_{t})_{t\geq 0}$ is a continuous
local martingale and $(A_{t})_{t\geq 0}$ is a continuous bounded variation
process started at zero. Local martingales are processes for which there
exists a sequence of stopping times $\tau_{n}\rightarrow\infty$ a.s. such that
the stopped processes $(M_{t\wedge\tau_{n}})_{t\geq 0}$ are all martingales.
Let $\langle X\rangle_{t}$ be the quadratic variation of $X$. Then the
following version of time-dependent Itô formula holds true:

######  Lemma 2.1.

Let $(X_{t})_{t\geq 0}$ be a continuous semimartingale and $F\in
C^{1,2}(\mathbb{R}^{+}\times\mathbb{R})$. Then:

$\displaystyle F(\langle
X\rangle_{t},X_{t})-F(0,X_{0})=\int_{0}^{t}\partial_{x}F(\langle
X\rangle_{t},X_{t})\text{d}X_{t}+\int_{0}^{t}\left(\partial_{t}+\frac{1}{2}\partial_{x}^{2}\right)F(\langle
X\rangle_{t},X_{t})\text{d}\langle X\rangle_{t},$

or formally:

$\displaystyle\text{d}F(\langle X\rangle_{t},X_{t})=\partial_{x}F(\langle
X\rangle_{t},X_{t})\text{d}X_{t}+\left(\partial_{t}+\frac{1}{2}\partial_{x}^{2}\right)F(\langle
X\rangle_{t},X_{t})\text{d}\langle X\rangle_{t},$

where by $\partial_{t},\partial_{x}$ we mean differentiation with respect to
the first and second coordinate respectively.

We would like to identify a sequence of polynomials $h_{n}$ such that

$\displaystyle(\partial_{t}+\frac{1}{2}\partial_{x}^{2})h_{n}(\langle
X\rangle_{t},X_{t})$ $\displaystyle=0$ (3)
$\displaystyle\partial_{x}h_{n}(\langle X\rangle_{t},X_{t})$
$\displaystyle=nh_{n-1}$ (4) $\displaystyle h_{n}(0,0)$ $\displaystyle=0$ (5)

as then $H_{t}^{n}:=h_{n}(\langle X\rangle_{t},X_{t})$ satisfies the SDE:
$\text{d}H_{t}^{n}=nH_{t}^{n-1}\text{d}X_{t}$. From here we can work
inductively to express the $n$-th order iterated integral of $X$ in terms of
$H_{t}^{n}$. If we further assume that $h_{0}(t,x)=1$, then we need
$h_{1}(t,x)=x$, so that $H_{t}^{1}=X_{t}=\int_{0}^{t}\text{d}X_{t}$. For the
induction step, suppose that

$\displaystyle
H_{s}^{n}=n!\int_{0}^{s}\int_{0}^{s_{n}}\dots\int_{0}^{s_{2}}\text{d}X_{s_{1}}\dots\text{d}X_{s_{n-1}}\text{d}X_{s_{n}}$

Then for any process started at zero we have:

$\displaystyle
H_{t}^{n+1}=(n+1)\int_{0}^{t}H_{s}^{n}=(n+1)!\int_{0}^{t}\int_{0}^{s}\int_{0}^{s_{n}}\dots\int_{0}^{s_{2}}\text{d}X_{s_{1}}\dots\text{d}X_{s_{n-1}}\text{d}X_{s_{n}}\text{d}X_{s}$

As it turns out, there exists a sequence of polynomials satisfying the
equations (3), (4), (5):

######  Definition 2.2.

Scaled Hermite polynomials are defined by

$\displaystyle\exp\left(\alpha
x-\alpha^{2}t/2\right)=\sum_{n=0}^{\infty}\frac{\alpha^{n}}{n!}h_{n}(t,x),$

or more explicitly by $h_{n}(t,x)=(t/2)^{n/2}\tilde{h}_{n}(x/\sqrt{t})$ where
$\tilde{h}_{n}(x)=(-1)^{n}e^{x^{2}/2}\frac{\text{d}^{n}}{\text{d}x^{n}}(e^{-x^{2}/2})$
are the Hermite polynomials.

Thus we proved the following:

######  Proposition 2.3.

Let $(X_{t})_{t\geq 0}$ be a continuous $\mathbb{R}$-valued semimartingale
started at zero and $h_{n}$ the $n$-th scaled Hermite polynomial as in Lemma
2.2. Then for any $t\geq 0$ we have:

$\displaystyle\mathbb{X}^{n,\text{It\^{o}}}_{0,t}:=\int_{0}^{t}\int_{0}^{s_{n}}\dots\int_{0}^{s_{2}}\text{d}X_{s_{1}}\dots\text{d}X_{s_{n-1}}\text{d}X_{s_{n}}=\frac{1}{n!}h_{n}(\langle
X\rangle_{t},X_{t})$

To analyse the asymptotic behaviour of $|\mathbb{X}^{n,\text{It\^{o}}}_{0,t}|$
we’ll exploit the asymptotic properties of Hermite polynomials as found in
[AS64], p.508-510:

$\displaystyle\tilde{h}_{n}(x)\sim
e^{x^{2}/2}\frac{2^{n}}{\sqrt{\pi}}\Gamma\left(\frac{n+1}{2}\right)\cos\left(x\sqrt{2n}-\frac{n\pi}{2}\right)$

Now we are in a good shape to prove the theorem (note that in $d=1$, the
admissible tensor norms are just the absolute value on $\mathbb{R}$):

######  Theorem 2.4.

Let $(X_{t})_{t\geq 0}$ be a continuous $\mathbb{R}$-valued semimartingale
started at zero. Then almost surely:

$\displaystyle
L^{\mathbb{X},\text{It\^{o}}}_{0,t}:=\limsup_{n}\left|\left(\frac{n}{2}\right)!\mathbb{X}_{0,t}^{n,\text{It\^{o}}}\right|^{2/n}=\frac{\langle
X\rangle_{t}}{2}$

###### Proof.

For simplicity, denote $x=X_{t}$ and $t=\langle X\rangle_{t}$, which are fixed
throughout the proof. By Proposition 2.3, asymptotics of Hermite polynomials
and Stirling’s formula we have:

$\displaystyle L^{\mathbb{X},\text{It\^{o}}}_{0,t}$
$\displaystyle=\limsup_{n}\left|\left(\frac{n}{2}\right)!\frac{1}{n!}\left(\frac{t}{2}\right)^{n/2}\tilde{h}_{n}\left(\frac{x}{\sqrt{t}}\right)\right|^{2/n}$
$\displaystyle=\frac{t}{2}\limsup_{n}\left|\frac{\sqrt{2\pi
n/2}(n/(2e))^{n/2}}{\sqrt{2\pi
n}(n/e)^{n}}e^{x^{2}/(4t)}\frac{2^{n}}{\sqrt{\pi}}\Gamma\left(\frac{n+1}{2}\right)\cos\left(x\sqrt{\frac{n}{t}}-\frac{n\pi}{2}\right)\right|^{2/n}$

So it remains to show that this limit is equal to 1. The first fraction can be
rewritten as $(\frac{e}{2n})^{n/2}2^{-1/2}$ and asymptotically we also have:

$\displaystyle\Gamma\left(\frac{n+1}{2}\right)=\Gamma\left(\frac{n}{2}+1-\frac{1}{2}\right)\sim\Gamma\left(\frac{n}{2}+1\right)\left(\frac{n}{2}+1\right)^{-1/2}\sim\sqrt{\pi
n}\left(\frac{n}{2e}\right)^{n/2}\left(\frac{n}{2}+1\right)^{-1/2}$

Consequently:

$\displaystyle L^{\mathbb{X},\text{It\^{o}}}_{0,t}$
$\displaystyle=\frac{t}{2}\limsup_{n}\left|2^{-n-1/2}\sqrt{\pi
n}\left(\frac{n}{2}+1\right)^{-1/2}\cdot
e^{x^{2}/(4t)}\frac{2^{n}}{\sqrt{\pi}}\cos\left(x\sqrt{\frac{n}{t}}-\frac{n\pi}{2}\right)\right|^{2/n}$
$\displaystyle=\frac{t}{2}\limsup_{n}\left(\left(\frac{n}{2}\right)^{1/n}\left(\frac{n}{2}+1\right)^{-1/n}e^{x^{2}/(2tn)}\right)\left|\cos\left(x\sqrt{\frac{n}{t}}-\frac{n\pi}{2}\right)\right|^{2/n}$

Now the RHS converges to 1, except the case when
$\cos\left(x\sqrt{\frac{n}{t}}-\frac{n\pi}{2}\right)\rightarrow 0$ fast
enough. Let us suppose for contradiction that it does. By continuity of
cosine, the argument must approach the set
$\cos^{-1}(\\{0\\})=\\{k\pi+\frac{\pi}{2}:k\in\mathbb{Z}\\}=:\frac{\pi}{2}+\pi\mathbb{Z}$.
We claim that if $x\sqrt{\frac{n}{t}}\rightarrow\frac{\pi}{2}+\pi\mathbb{Z}$,
then there exists $k\in\mathbb{Z}$ such that
$x\sqrt{\frac{n}{t}}\rightarrow\frac{\pi}{2}+k$. To see this, consider the
difference

$\displaystyle\left|x\sqrt{\frac{n+1}{t}}-x\sqrt{\frac{n}{t}}\right|=\left|\frac{x}{\sqrt{t}}\right|(\sqrt{n+1}-\sqrt{n})=\left|\frac{x}{\sqrt{t}}\right|\frac{1}{\sqrt{n+1}+\sqrt{n}}\rightarrow
0,$

and so this is eventually smaller than $\frac{\pi}{2}$. But this yields a
contradiction, since $\frac{x}{\sqrt{t}}\sqrt{n}\rightarrow\infty$ as
$n\rightarrow\infty$, which concludes the proof. ∎

######  Remark 2.5.

There is a much nicer proof of this result, which however doesn’t give us the
precise factor, by which $L^{\mathbb{X}}_{0,t}$ depends on $\langle
X\rangle_{t}$. It uses the fact that each local martingale can be written as a
Brownian motion running at a different speed of time, and then since the
signature is invariant under time-reparametrisation,
$L^{\mathbb{X}}_{0,t}=L^{\mathbb{B}}_{0,\langle
X\rangle_{t}}=\kappa_{1}\langle X\rangle_{t}$. This can be extended to
diffusions with drift using Girsanov’s theorem.

##  3 Extension into the fractional Brownian motion case

In real-world applications of stochastic analysis, we’re often interested in
modelling phenomena which depend on a random driving signal. The simplest
model for this signal is Brownian motion. However, most real inputs exhibit
some form of temporal dependence, and so it’s sometimes convenient to replace
the driving signal by a generalisation of Brownian motion that depends on a
parameter $H\in(0,1)$, which describes the time-persistence of the process.
For example, to model the water level in a river we would expect $H>1/2$, but
to model prices of electricity in a liberated market we would expect $H<1/2$.
In statistical applications, it could be of interest to estimate the parameter
$H$ and to derive an expression of $H$ in terms of the signature of $B^{H}$
will be the aim of this section.

######  Definition 3.1.

Fractional Brownian Motion (fBM) of Hurst parameter $H\in(0,1)$ is a centered
Gaussian process $B^{H}:\Omega\times[0,\infty)\rightarrow\mathbb{R}$ with a.s.
continuous paths and covariance

$\displaystyle
R_{H}(s,t):=E[B^{H}_{s}B^{H}_{t}]=\frac{1}{2}(t^{2H}+s^{2H}-|t-s|^{2H})$

Except when $H=1/2$ and the process is just the standard BM, this isn’t a
semimartingale, hence the result of the previous section doesn’t apply, and
it’s not even clear how to set up a consistent integration theory. Not only
there are multiple ways of doing this, but these also depend on the value of
$H$. Although for any $H$ we can construct a rough path over a
multidimensional $B^{H}$ [Unt10], for $H\leq 1/4$ it is believed that there
exists no cannonical lift into a geometric rough path. For $H>1/4$ this is
possible, and it was even shown that under the cannonical lifting of $B^{H}$,
the signature uniquely determines the sample paths [BG14].

While it would be of interest to determine the value of the limit for this
cannonical lift, for now we only focus on the case $H>1/2$ in the one-
dimensional setting. Then we’re able to define an Itô-type integral with a
version of the Itô formula, and apply the results of the previous chapter.
This integral is called the fractional Wiener-Itô-Skorokhod (fWIS) integral
and is defined analogously to the Skorokhod integral (following the reference
[BHOZ08]). Recall the basic white noise theory set-up:

Let $\Omega=\mathcal{S}^{\prime}(\mathbb{R}^{+})$ be the space of tempered
distributions, defined as the dual of the Schwarz space
$\mathcal{S}(\mathbb{R}^{+})$ of rapidly decreasing functions. In the Brownian
motion case we would use Bochner-Minlos theorem to construct a probability
measure $\mathbb{P}$ on $\mathcal{B}(\Omega)$ characterised by:

$\displaystyle\int_{\Omega}\exp{(i\langle\omega,f\rangle)}\mathbb{P}(\text{d}\omega)=\exp{\left(-\frac{1}{2}\|f\|_{L^{2}(\mathbb{R}^{+})}\right)}\hskip
28.45274pt\forall f\in\mathcal{S}(\mathbb{R}^{+})$

Then we would have that the random variable
$F(\omega):=\langle\omega,f\rangle$ corresponds with the Itô integral of
deterministic $f$ with respect to the Brownian motion. In the case of
fractional Brownian motion, all we need to do is to change the inner product
on $\mathcal{S}(\mathbb{R}^{+})\subset L^{2}(\mathbb{R}^{+})$ into:

$\displaystyle\langle
f,g\rangle_{H}:=\int_{0}^{\infty}\int_{0}^{\infty}f(s)g(t)\theta_{H}(s,t)\text{d}s\text{d}t,$

where $\theta_{H}(s,t)=H(2h-1)|s-t|^{2h-1}$ so that
$\int_{0}^{t}\int_{0}^{s}\theta_{H}(u,v)\text{d}u\text{d}v=R_{H}(s,t)$. Let
$L_{\theta,H}^{2}(\mathbb{R}^{+})$ be the completion of the Schwarz space with
respect to the norm induced by this new inner product, which becomes a Hilbert
space. Then for any $f$ in this space, we can define the stochastic integral
by
$(\int_{0}^{t}f_{s}\text{d}B^{H}_{s})(\omega):=\langle\omega,\lim_{n}f_{n}1_{[0,t]}\rangle=\lim_{n}\langle\omega,f_{n}1_{[0,t]}\rangle$
or more constructively as in [GN96]. Note that for
$\tilde{B}_{t}^{H}(\omega):=\langle\omega,1_{[0,t]}\rangle$ we have that

$\displaystyle\mathbb{E}[\tilde{B}_{t}^{H}]$ $\displaystyle=0$
$\displaystyle\mathbb{E}[\tilde{B}_{t}^{H}\tilde{B}_{s}^{H}]$
$\displaystyle=\langle
1_{[0,s]},1_{[0,t]}\rangle_{H}=\int_{0}^{t}\int_{0}^{s}\theta_{H}(u,v)\text{d}u\text{d}v=R_{H}(s,t)$

From Kolgomorov’s continuity criterion it follows that this process has a
continuous version, which is a fractional Brownian motion, as we would expect.

To define the fWIS integral for stochastic integrand and set up an analouge of
the Itô formula a lot of work is required, using tools from Malliavin
calculus, and so we refer the reader to [BHOZ08]. We only need the following
corollary of Itô formula, which can be found in the reference as Theorem
3.8.1:

######  Lemma 3.2.

For deterministic $f\in L_{\theta,H}^{2}(\mathbb{R}^{+})$ define:

$\displaystyle
h_{n}^{H,f}(t)=\|f\|_{\theta,H,t}^{n}h_{n}\left(\|f\|_{\theta,H,t}^{-1}\int_{0}^{t}f_{s}dB_{s}^{H}\right),$

where:

$\displaystyle\|f\|_{\theta,H,t}^{2}:=\int_{0}^{t}\int_{0}^{t}f(u)f(v)\theta_{H}(u,v)\text{d}u\text{d}v,$

and $h_{n}(x)=2^{-n/2}\tilde{h}_{n}(x/\sqrt{2})$ are another version of the
Hermite polynomials as defined in Definition 2.2. This satisfies the following
recursive relation:

$\displaystyle dh_{n}^{H,f}(t)=nh_{n-1}^{H,f}(t)f_{t}dB_{t}^{H}$

Now we can follow the same strategy as taken in Section 2 to show that
iterated integrals with respect to the stochastic process $(X_{t}^{H})_{t\geq
0}$, driven by fractional BM in the sense that
$\text{d}X_{t}^{H}=f_{t}\text{d}B_{t}^{H}$ for some $f\in
L_{\theta,H}^{2}(\mathbb{R}^{+})$, satisfy:

$\displaystyle\mathbb{X}^{n,H}_{0,t}:=\int_{0}^{t}\int_{0}^{s_{n}}\dots\int_{0}^{s_{2}}\text{d}X_{s_{1}}^{H}\dots\text{d}X_{s_{n-1}}^{H}\text{d}X_{s_{n}}^{H}=\frac{1}{n!}h_{n}^{H,f}(X_{t}^{H})$

Consequently,

$\displaystyle L^{\mathbb{X},H}_{0,t}:$
$\displaystyle=\limsup_{n}\left|(n/2)!\mathbb{X}^{n,H}_{0,t}\right|^{2/n}$
$\displaystyle=\limsup_{n}\left|\frac{(n/2)!}{n!}h_{n}^{H,f}(X_{t}^{H})\right|^{2/n}$
$\displaystyle=\limsup_{n}\left|\frac{(n/2)!}{n!}\|f\|_{\theta,H,t}^{n}h_{n}\left(\|f\|_{\theta,H,t}^{-1}\int_{0}^{t}f_{s}dB_{s}^{H}\right)\right|^{2/n}$
$\displaystyle=\frac{\|f\|_{\theta,H,t}^{2}}{2}\limsup_{n}\left|\frac{(n/2)!}{n!}\tilde{h}_{n}\left(\frac{\|f\|_{\theta,H,t}^{-1}X_{s}^{H}}{\sqrt{2}}\right)\right|^{2/n}$

We already know from the proof of Theorem 2.4 that this limit converges to 1
almost surely and therefore we proved:

######  Theorem 3.3.

Let $(B_{t}^{H})_{t\geq 0}$ be a fractional Brownian motion and
$X_{t}^{H}:=\int_{0}^{t}f_{s}\text{d}B_{s}^{H}$ for some $f\in
L_{\theta,H}^{2}(\mathbb{R}^{+})$. Then almost surely:
$L^{\mathbb{X},H}_{0,t}=\frac{1}{2}\|f\|_{\theta,H,t}^{2}$

As a simple application of this result for $f=1_{[0,t]}$ we get that

$\displaystyle
L^{\mathbb{B},H}_{0,t}=\frac{1}{2}\|1_{[0,t]}\|_{\theta,H,t}^{2}=\frac{1}{2}R_{H}(t,t)=\frac{1}{2}t^{2H}$

which agrees with the result we found for standard Brownian Motion ($H=1/2$).
This can be used to derive an expression for $H$ in terms of iterated fWIS
integrals (log is an increasing continuous function, so we can exchange it
with lim sup):

######  Corollary 3.4.

Let $(B_{t}^{H})_{t\geq 0}$ be a fractional Brownian motion. Then for any
$t>0$ we have almost surely:

$\displaystyle H=\limsup_{n}\frac{1}{2\log
t}\log\left(2\left|(n/2)!\mathbb{B}^{n,H}_{0,t}\right|^{2/n}\right)$

##  4 Extension into multi-dimensional settings and further work

To extend our results on the limit of Itô signatures for $d$-dimensional
semimartingales, we first looked at $d$-dimensional Brownian motion and
managed to prove an upper bound.

######  Theorem 4.1.

Let $(B_{t})_{t\geq 0}=(B_{t}^{1},\dots,B_{t}^{d})_{t\geq 0}$ be a
$d$-dimensional Brownian motion and $\mathbb{B}_{0,t}\in T((\mathbb{R}^{d}))$
its Itô signature. Assume that $(\|\cdot\|_{n})_{n}$ a sequence of $l^{2}$
norms, each on $(\mathbb{R}^{d})^{\otimes n}$. Then almost surely we have:

$\displaystyle\limsup_{n}\left\|\left(\frac{n}{2}\right)!\mathbb{B}_{0,t}^{n}\right\|_{n}^{\frac{2}{n}}\leq\frac{dt}{2}$

###### Proof.

Fix $k\in\mathbb{N}$. If we show that we can bound the limit from above by
$\frac{dt}{2}+\frac{1}{k}$ outside some null set $\mathcal{N}_{k}$, then we
can let $\mathcal{N}=\bigcup_{k}\mathcal{N}_{k}$, which is still a null set,
and then the claim follows. It is enough to show that:

$\displaystyle\mathbb{P}\left(\left\|\left(\frac{n}{2}\right)!\mathbb{B}_{0,t}^{n}\right\|_{n}^{\frac{2}{n}}>\frac{dt}{2}+\frac{1}{k}\text{
i.o.}\right)=0$

By Borel-Cantelli, it suffices checking that the following sum converges:

$\displaystyle\sum_{n=1}^{\infty}\mathbb{P}\left(\left(\left(\frac{n}{2}\right)!\right)^{2}\left\|\mathbb{B}_{0,t}^{n}\right\|_{n}^{2}>\left(\frac{dt}{2}+\frac{1}{k}\right)^{n}\right)$

Markov inequality gives us the following upper bound:

$\displaystyle\sum_{n=1}^{\infty}\left(\frac{dt}{2}+\frac{1}{k}\right)^{-n}\mathbb{E}\left[\left(\left(\frac{n}{2}\right)!\right)^{2}\left\|\mathbb{B}_{0,t}^{n}\right\|_{n}^{2}\right]$

Now if we manage to show that

$\displaystyle\lim_{n}\mathbb{E}\left[\left(\left(\frac{n}{2}\right)!\right)^{2}\left\|\mathbb{B}_{0,t}^{n}\right\|_{n}^{2}\right]^{\frac{1}{n}}\leq\frac{dt}{2}$
(6)

we can find $N$ such that for $n>N$ the LHS is less that
$\frac{dt}{2}+\frac{1}{2k}$ and then the sum above converges:

$\displaystyle\sum_{n=1}^{\infty}\left(\frac{dt}{2}+\frac{1}{k}\right)^{-n}\mathbb{E}\left[\left(\left(\frac{n}{2}\right)!\right)^{2}\left\|\mathbb{B}_{0,t}^{n}\right\|_{n}^{2}\right]\leq\sum_{n=1}^{N}(\dots)+\sum_{n=N+1}^{\infty}\left(\frac{\frac{dt}{2}+\frac{1}{2k}}{\frac{dt}{2}+\frac{1}{k}}\right)^{-n}<\infty$

We actually manage to show equality for (6). Note that asymptotically,
$\left(\left(\frac{n}{2}\right)!\right)^{2}\sim\frac{n!}{2^{n}}$. Then the
limit is equal to:
$\frac{1}{2}\lim_{n}\left(n!\mathbb{E}\|\mathbb{B}_{0,t}^{n}\|_{n}^{2}\right)^{1/n}$,
and so it suffices to show that
$\mathbb{E}\|\mathbb{B}_{0,t}^{n}\|_{n}^{2}=\frac{d^{n}t^{n}}{n!}$. We’ll do
this by induction on $n$. For $n=1$ we have by Itô isometry that:

$\displaystyle\mathbb{E}\|\mathbb{B}_{0,t}^{1}\|_{1}^{2}=\sum_{i=1}^{d}\mathbb{E}\left[\left(\int_{0}^{t}\text{d}B_{s}^{i}\right)^{2}\right]=dt$

Assuming the claim for $n-1$, we now have:

$\displaystyle\mathbb{E}\|\mathbb{B}_{0,t}^{n}\|_{n}^{2}$
$\displaystyle=\sum_{i_{1}=1,\dots,i_{n}=1}^{d}\mathbb{E}\left[\left(\int_{0}^{t}\dots\int_{0}^{s_{2}}\text{d}B_{s_{1}}^{i_{1}}\dots\text{d}B_{s_{n}}^{i_{n}}\right)^{2}\right]$
$\displaystyle=\sum_{i_{n}=1}^{d}\int_{0}^{t}\sum_{i_{1}=1,\dots,i_{n-1}=1}^{d}\mathbb{E}\left[\left(\int_{0}^{s_{n}}\dots\int_{0}^{s_{2}}\text{d}B_{s_{1}}^{i_{1}}\dots\text{d}B_{s_{n-1}}^{i_{n-1}}\right)^{2}\right]\text{d}s_{n}$
$\displaystyle=d\int_{0}^{t}\frac{d^{n-1}s_{n}^{n-1}}{(n-1)!}\text{d}s_{n}=\frac{d^{n}t^{n}}{n!},$

which concludes the proof. ∎

###  4.1 Further work and conclusion

The first step in extending this into general semimartingales would be looking
at a process, whose each coordinate is a Brownian motion scaled by a different
constant. In this case we could show that the limit is bounded by the square
of the highest constant, but that’s not sharp.

Proving a lower bound is even harder. In [BG19] a lower bound for Stratonovich
signatures was proved using hyperbolic development (introduced in [HL10]), but
this crucially relied on terms that stem from Itô-Stratonovich conversion, and
so we couldn’t apply it in our setting. Utilising formulas for the expected
signature (e.g. [Faw02]) failed for similar reasons.

Extending the methods of Remark 2.5 wouldn’t work as the "clock" of each
coordinate runs at a different speed, so we can’t change the time uniformly.
Deriving a generalization of Hermite polynomials in higher dimension might be
useful, but now it’s unclear what SDE we’d like it to solve - how do we even
wish define the quadratic variation for a $d$-dimensional process?

Another method we unsuccessfully tried was to use that the signature kernel
solves a Goursat PDE [SCF+21] and then exploit properties of this PDE.

Finally, we ran simulations of a 2-dimensional Brownian motion, whose
coordinates are scaled by different factors, and computed signature of its
piecewise linear approximations, which should converge to the Stratonovich
signature. These simulations seemed to suggest the following:

######  Conjecture 4.2.

Let $(B_{t})_{t\geq 0}=(B_{t}^{1},\dots,B_{t}^{d})_{t\geq 0}$ be a
$d$-dimensional Brownian motion and $V$ an invertible $d\times d$ matrix. Then
for $X=VB$ we have $L^{\mathbb{X},\text{Strat}}_{s,t}=|\det
V|\kappa_{d}(t-s)$, where $\kappa_{d}$ only depends on the dimension $d$ and
choice of tensor norms.

The precise value and meaning of the constant $\kappa_{d}$ is still unclear;
according to our simulations in $d=2$ it should be around 1.3 for $l^{1}$ and
0.7 for $l^{2}$ norms.

What is worse, convergence to the constant was really slow for some sample
paths, and computational cost of calculating higher order terms of the
signature explodes exponentially fast. Even if it didn’t, results of this
paper still can’t be used for estimation of quadratic variation or the Hurst
parameter, because we yet can’t recover Itô signature from the signature of
piecewise linear approximations.

We managed to prove a simple formula for this conversion in $d=1$:

$\displaystyle\mathbb{B}_{0,t}^{\text{It\^{o}}}=\mathbb{B}^{\text{Strat}}_{0,t}\otimes\exp\left(-\frac{1}{2}e_{1}\otimes
e_{1}t\right)$

However, there is still very little we know about the higher-dimensional
setting, which would require further work.

## References

  * [AS64] Milton Abramowitz and Irene A. Stegun.  Handbook of mathematical functions with formulas, graphs, and mathematical tables, volume No. 55 of National Bureau of Standards Applied Mathematics Series.  U. S. Government Printing Office, Washington, DC, 1964.  For sale by the Superintendent of Documents.
  * [BG14] Horatio Boedihardjo and Xi Geng.  The uniqueness of signature problem in the non-markov setting, 2014.
  * [BG19] H. Boedihardjo and X. Geng.  Tail asymptotics of the Brownian signature.  Trans. Amer. Math. Soc., 372(1):585–614, 2019.
  * [BHOZ08] Francesca Biagini, Yaozhong Hu, Bernt Oksendal, and Tusheng Zhang.  Stochastic calculus for fractional Brownian motion and applications.  Probability and its Applications (New York). Springer-Verlag London, Ltd., London, 2008.
  * [Faw02] Thomas Fawcett.  Problems in stochastic analysis: connections between rough paths and non-commutative harmonic analysis.  PhD thesis, University of Oxford, 2002.
  * [FLMS23] Adeline Fermanian, Terry Lyons, James Morrill, and Cristopher Salvi.  New directions in the applications of rough path theory.  IEEE BITS the Information Theory Magazine, 2023.
  * [GN96] Gustaf Gripenberg and Ilkka Norros.  On the prediction of fractional Brownian motion.  J. Appl. Probab., 33(2):400–410, 1996.
  * [HL10] Ben Hambly and Terry Lyons.  Uniqueness for the signature of a path of bounded variation and the reduced path group.  Annals of Mathematics, 171(1):109–167, March 2010.
  * [Kle20] Achim Klenke.  Probability theory—a comprehensive course.  Universitext. Springer, Cham, third edition, [2020] ©2020.
  * [LCL07] Terry J. Lyons, Michael Caruana, and Thierry Lévy.  Differential equations driven by rough paths, volume 1908 of Lecture Notes in Mathematics.  Springer, Berlin, 2007.  Lectures from the 34th Summer School on Probability Theory held in Saint-Flour, July 6–24, 2004, With an introduction concerning the Summer School by Jean Picard.
  * [LQ11] Yves LeJan and Zhongmin Qian.  Stratonovich’s signatures of brownian motion determine brownian sample paths, 2011.
  * [Lyo98] Terry J Lyons.  Differential equations driven by rough signals.  Revista Matemática Iberoamericana, 14(2):215–310, 1998.
  * [SCF+21] Cristopher Salvi, Thomas Cass, James Foster, Terry Lyons, and Weixin Yang.  The signature kernel is the solution of a Goursat PDE.  SIAM J. Math. Data Sci., 3(3):873–899, 2021.
  * [Unt10] Jérémie Unterberger.  A rough path over multidimensional fractional brownian motion with arbitrary hurst index by fourier normal ordering.  Stochastic Processes and their Applications, 120(8):1444–1472, 2010.


# An Experimental Analysis of RowHammer in HBM2 DRAM Chips

Ataberk Olgun1 Majd Osseiran1,2 A. Giray Yağlıkçı1 Yahya Can Tuğrul1
Haocong Luo1 Steve Rhyner1 Behzad Salami1 Juan Gomez Luna1 Onur Mutlu1
1 _SAFARI Research Group, ETH Zürich_ 2 _American University of Beirut_

###### Abstract

RowHammer (RH) is a significant and worsening security, safety, and
reliability issue of modern DRAM chips that can be exploited to break memory
isolation. Therefore, it is important to understand real DRAM chips’ RH
characteristics. Unfortunately, no prior work extensively studies the RH
vulnerability of modern 3D-stacked high-bandwidth memory (HBM) chips, which
are commonly used in modern GPUs.

In this work, we experimentally characterize the RH vulnerability of a real
HBM2 DRAM chip. We show that 1) different 3D-stacked channels of HBM2 memory
exhibit significantly different levels of RH vulnerability (up to
$79\text{\,}\mathrm{\char 37\relax}$ difference in bit error rate), 2) the
DRAM rows at the end of a DRAM bank (rows with the highest addresses) exhibit
significantly fewer RH bitflips than other rows, and 3) a modern HBM2 DRAM
chip implements undisclosed RH defenses that are triggered by periodic refresh
operations. We describe the implications of our observations on future RH
attacks and defenses and discuss future work for understanding RH in
3D-stacked memories.

##  1 Introduction

Modern DRAM chips suffer from the RowHammer (RH) phenomenon [1, 2, 3, 4, 5]
where repeatedly opening (i.e., activating) and closing a DRAM row (i.e.,
aggressor row) induces bitflips in physically nearby rows (i.e., victim rows),
breaking memory isolation [1, 6, 7, 8, 9, 10, 11, 12, 13, 4, 14, 15, 16, 17,
18, 19, 20, 21, 22, 5, 23, 24, 25, 2, 26, 27]. Numerous studies experimentally
demonstrate that a malicious attacker can reliably induce RH bitflips in a
targeted manner to compromise system integrity, confidentiality, and
availability [28, 29, 30, 31, 32, 33, 34, 35, 1, 36, 37, 38, 39, 40, 41, 42,
43, 44, 45, 46, 47, 48, 49, 2, 50, 51, 52, 53, 54, 55, 56, 27, 57, 58, 25, 59,
60, 61, 62, 63, 64, 65, 66, 67, 15, 68, 69, 16, 70, 71, 72, 73, 74, 75, 76,
77, 78, 79, 80, 81, 82, 83, 84, 85]. RH worsens in newer DRAM chips with
smaller technology nodes, where RH bitflips 1) occur with fewer row
activations, e.g., more than $10\times$ reduction in less than a decade [4],
and 2) manifest in more DRAM cells, compared to older DRAM chips [4, 25, 17,
14, 2, 26, 27, 5].

To meet the high bandwidth requirements of modern data-intensive applications
(e.g., GPU workloads [86, 87, 88, 89]), DRAM designers develop High Bandwidth
Memory (HBM) [90] DRAM chips, which contain multiple layers of 3D-stacked DRAM
dies, using cutting-edge technology nodes. It is important to understand RH in
HBM DRAM chips that have new architectural characteristics (e.g., multiple
layers of DRAM dies and area- and energy-intensive through-silicon vias) which
might potentially affect the RH vulnerability in various ways. Such
understanding can help identify potential RH-induced security, safety, and
reliability issues in HBM-based systems and allow system designers to develop
effective and efficient defense mechanisms. Unfortunately, _no_ prior work
studies the RH vulnerability of modern HBM DRAM chips.

Our goal in this work is to experimentally analyze how vulnerable HBM DRAM
chips are to RH. To this end, we provide the first detailed experimental
characterization of the RH vulnerability in a modern HBM2 DRAM chip. We
provide two main analyses in our study. First, we analyze the spatial
variation in RH vulnerability based on the physical location of victim rows in
terms of two metrics: the fraction of DRAM cells that experience a bitflip in
a DRAM row (i.e., Bit Error Rate, $BER$) and the minimum aggressor row
activation count necessary to cause an RH bitflip (i.e., $HC_{first}$). §4
shows detailed results on how RH vulnerability varies across HBM2 channels,
pseudo channels, banks, and rows. Second, we investigate undisclosed in-DRAM
RH mitigations, triggered by periodic refreshes (e.g., TRR [91, 25, 64]) in
HBM2 (§5).111The HBM2 standard [90] specifies a mode called Target Row Refresh
(TRR). To enable TRR Mode, the memory controller issues a well-defined series
of commands. Different from this mode, we investigate whether an _undisclosed_
TRR mechanism is implemented in the tested chip.

We summarize the three major observations from our experimental analyses.
First, different 3D-stacked channels of the HBM2 chip exhibit significantly
different levels of RH vulnerability in $BER$ (up to 79%) and $HC_{first}$ (up
to 20%). Second, DRAM rows near the end of a DRAM bank (the last 832 out of
16K rows) exhibit substantially smaller $BER$ than other DRAM rows. Third, the
tested HBM2 DRAM chip implements an undisclosed in-DRAM RH defense mechanism
(§5). Our experimental analyses also show that the RH vulnerability of a cell
depends on i) the cell’s physical location within a DRAM bank and ii) data
stored in the neighboring cells, similar to prior works’ findings in DDR3/4
DRAM chips [1, 4, 14].

We make the following contributions:

  * •

We present the first detailed experimental characterization of the RowHammer
(RH) vulnerability in a modern HBM2 DRAM chip and show that it is susceptible
to RH bitflips.

  * •

We show that the RH vulnerability significantly varies across HBM2 DRAM
channels and rows within each channel.

  * •

We show that an HBM2 DRAM chip implements an undisclosed in-DRAM RH mitigation
mechanism, which resembles the one found in recent DDR4 DRAM chips
manufactured by a major DRAM manufacturer [64].

##  2 Background

###  2.1 HBM2 Organization & Operation

Fig. 1 presents the organization of an HBM2 DRAM chip [90, 92] when used in an
FPGA-based system. The FPGA (❶) has a memory controller communicating with one
or multiple stacks of HBM using the HBM2 interface via a silicon interposer.
An HBM2 stack (❷) contains multiple DRAM dies that are stacked on top of the
buffer die and connected using through-silicon vias (TSVs). Each HBM2 die has
one or more (shown two) independent HBM2 channels. An HBM2 channel (❸)
consists of two pseudo channels (❹), each of which with multiple (e.g., 16)
DRAM banks. A DRAM bank (❺) consists of hundreds of subarrays [93, 94, 95]. A
DRAM subarray (❻) has many DRAM cells that are laid in a two-dimensional array
of rows and columns, and a row buffer. DRAM cells are internally accessed at
DRAM row granularity by asserting a wire called wordline. Each DRAM cell in a
row is connected to the row buffer (i.e., sense amplifiers) via another wire
called bitline.

Figure 1: HBM2 DRAM System Organization

Operation. The memory controller issues an activate (ACT) command targeting a
DRAM row to access a DRAM cell. The row decoder asserts the row’s wordline,
copying the data in the row to the row buffer. To access a different cell in
another DRAM row, the memory controller issues a precharge ($PRE$) command,
which deasserts the wordline.

Periodic refresh. A DRAM cell stores data as charge in its capacitor. Because
the capacitor loses charge over time, it must be periodically refreshed to
prevent data corruption. To refresh DRAM cells, the memory controller
periodically issues refresh ($REF$) commands (e.g., every
$3.9\text{\,}\mathrm{\SIUnitSymbolMicro s}$) such that each cell is refreshed
once at a fixed refresh period (e.g., $32\text{\,}\mathrm{ms}$).

##  3 Experimental Infrastructure

We experimentally study an HBM2 chip using a modified version of the DRAM
Bender testing infrastructure [96, 97, 98, 99]. This infrastructure allows us
to precisely control the HBM2 command timings at the granularity of
$1.66\text{\,}\mathrm{ns}$ (i.e., the HBM2 interface clock speed is 600 MHz).
Our HBM2 chip has i) a stack density of 4 GiB, ii) 8 channels, iii) 2 pseudo
channels, iv) 16 banks, v) 16384 rows, and vi) 32 columns.

Testing setup. Figure 2 shows our testing setup. We conduct our experiments
using a Bittware XUPVVH HBM2 FPGA board [100] (1). We use the heating pad (2)
and the cooling fan (3) to change the ambient temperature of the HBM2 chip.
The Arduino MEGA [101] temperature controller (4) communicates with i) the
host machine to retrieve a target temperature and ii) the FPGA board to
retrieve the HBM2 chip’s temperature. The temperature controller controls the
heating pad and the cooling fan using a closed-loop PID controller. A host
machine executes the test programs described in §3.1 on the FPGA board using
the PCIe connection (5).

Figure 2: HBM2 DRAM testing infrastructure

###  3.1 Testing Methodology

Disabling Sources of Interference. We identify four sources that can interfere
with our characterization results: 1) periodic refresh [90], 2) on-die RH
defense mechanisms (e.g., TRR [25, 64, 91]), 3) data retention failures [102,
103, 104, 105], and 4) ECC [106, 107, 108, 109]. First, we do _not_ issue
periodic refresh commands in our experiments. Second, disabling periodic
refresh disables all known on-die RH defense mechanisms [14, 17, 4, 64, 110].
Third, we ensure that our experiments finish within $27\text{\,}\mathrm{ms}$,
which is significantly smaller than the standard refresh period of
$32\text{\,}\mathrm{ms}$ where manufacturers guarantee no data retention
errors will occur [90]. Fourth, we disable ECC by setting the corresponding
HBM2 mode register bit to zero [90].

RH Access Pattern. We use double-sided RH [1, 4, 14, 37], whereby we alternate
activations to each of the aggressor rows neighboring a victim row. To find
which rows are physically adjacent, we reverse-engineer the logical (memory-
controller-visible) to physical (in-DRAM) row address mapping [1, 111, 112,
113, 114, 102, 115, 104, 116, 117, 50, 32, 59, 108, 118, 14], following the
methodology described in prior work [14].

RH Test Parameters. We define one hammer as a pair of activations to the two
aggressor rows. We measure two metrics in our tests: $BER$ and $HC_{first}$,
as defined in §1. We use 256K hammers (i.e., 512K activations) in our $BER$
experiments and up to 256K hammers in our $HC_{first}$ experiments. We repeat
both experiments for each of the four data patterns shown in Table 1. We
define the worst-case data pattern (_WCDP_) as the data pattern that causes
the smallest $HC_{first}$ for a given row. When multiple data patterns cause
the smallest $HC_{first}$, we select _WCDP_ as the data pattern that causes
the largest $BER$ at a hammer count of 256K. To maintain a reasonable
experiment time, we study the effects of RH on the first, middle, and last 3K
rows in a bank in every channel and repeat all experiments five times. The
HBM2 chip’s temperature is kept at $85$°C, the maximum operating temperature
at the nominal refresh rate, in all of our experiments.

Table 1: Data patterns used in our RH tests

Row Addresses Rowstripe0 Rowstripe1 Checkered0 Checkered1 Victim (V) 0x00 0xFF
0x55 0xAA Aggressors (V $\pm$ 1) 0xFF 0x00 0xAA 0x55 V $\pm$ [2:8] 0x00 0xFF
0x55 0xAA

##  4 Spatial Variation Analysis

We provide the first spatial variation analysis of RH across HBM2 channels,
pseudo channels, banks, and rows.

Fig. 3 shows a box-and-whiskers plot depicting the distribution of $BER$
(y-axis) across different DRAM rows for a given data pattern (x-axis) in a
channel (color-coded).222The lower- and upper-bounds of the box are the first
and the third quartiles, marking the medians of the first and second half of
the ordered set of data points, respectively. Whiskers show the minimum and
maximum values. The circle marker in each box shows the distribution’s mean.
In addition to the four data patterns, we choose and plot the $BER$ for the
_WCDP_ of each row.

Figure 3: The fraction of DRAM cells that experience a bitflip in a DRAM row
($BER$) across different DRAM rows, channels, and data patterns. Error bars
show the range of $BER$ across rows.

We make four major observations from Fig. 3. First, RH bitflips occur in
_every_ tested DRAM row across _all_ HBM channels. Second, $BER$ varies across
channels. A subset of channels (channels 6 and 7) exhibit significantly higher
$BER$ than other channels. For example, channel 7 (with the highest $BER$) has
${2.03}\times$ higher $BER$ than channel 0 (with the lowest $BER$) for _WCDP_.
Third, channels can be classified into groups of two based on the number of
bitflips they exhibit. We highlight these groups using different shades of the
same color in the figure. We hypothesize that groups of channels are spread
across _different_ HBM2 DRAM dies. The variation in $BER$ across the channel
groups could be due to manufacturing process variation (similar to that in
DDR3/4 DRAM chips [1, 4, 14, 6, 7]). Fourth, $BER$ changes with data pattern,
e.g., the maximum $BER$ in channel 7 is 3.13% and 2.04% for data patterns
Rowstripe1 and Checkered0, respectively.

Fig. 4 shows the distribution of $HC_{first}$ (y-axis) across different DRAM
rows for a given data pattern (x-axis) in a channel (color-coded) using a box-
and-whiskers plot.2 In addition to the four data patterns, we choose and plot
the $HC_{first}$ for the _WCDP_ of each row.

Figure 4: The minimum aggressor row activation count necessary to cause a
RowHammer bitflip ($HC_{first}$) across different DRAM rows, channels, and
data patterns.

We make three major observations from Fig. 4. First, $HC_{first}$ is as low as
14531 across all tested channels and data patterns. Second, different channels
exhibit different $HC_{first}$ distributions. For example, channels 7 and 6
contain more rows with smaller $HC_{first}$ values than other channels.
Because these channels also exhibit a higher number of RH bitflips than other
channels, we hypothesize that these channels belong in the die with the worst
RH vulnerability across all dies. Third, the $HC_{first}$ distribution in a
channel depends on the data pattern used. For example, the mean $HC_{first}$
for Rowstripe0 and Rowstripe1 in channel 0 are 57925 and 79179, respectively.
We conclude that testing with different data patterns is necessary to assess
the RH vulnerability of HBM2 DRAM chips as no data pattern achieves the
smallest $HC_{first}$ or $BER$ (Fig. 3).

Fig. 5 shows the BER (y-axis) for tested DRAM rows (x-axis) when we use the
per-row _WCDP_ to initialize the rows. Different channels are color-coded and
different subplots show the three regions (first, middle, and last 3K rows) we
test.

Figure 5: The fraction of DRAM cells that experience a bitflip in a DRAM row
($BER$) for different rows across a bank in different channels. Higlighted
regions show individual DRAM subarrays.

We make two major observations from Fig. 5. First, the $BER$ periodically
increases and decreases across DRAM rows such that it is higher in the middle
of a _subarray_ and lower towards either end of the subarray.333We reverse
engineer subarray boundaries by performing single-sided RH [1, 4] that induces
bitflips in _only one_ of the victim rows if the aggressor row is at the edge
of a subarray. We find that a subarray contains either 832 (SA X in Fig. 5) or
768 (SA Y in Fig. 5) DRAM rows. We hypothesize that this pattern results from
the physical organization of the DRAM banks. For example, the RH vulnerability
of a row could increase with the row’s distance from the row buffer. Second,
significantly fewer bitflips occur in the last subarray of the bank (e.g., the
last 832 rows in SA Z) compared to the rest of the bank. We hypothesize that
this is due to the DRAM bank’s physical placement. For example, assuming that
proximity to the shared I/O circuitry on the DRAM die affects the RH
vulnerability of a subarray, the last subarray might be placed near this
shared I/O circuitry [119]. We leave further analysis on subarrays to future
work.

We examine RH vulnerability differences across banks by comparing the RH $BER$
distribution over 300 rows (the first, the middle, and the last 100 rows) in
each of the 256 banks (across 8 channels and two pseudo channels per channel).
Fig. 6 shows each bank in a scatter plot based on its $BER$ distribution: 1)
the coefficient of variation (CV) 444CV is a distribution’s standard
deviation, normalized to its mean [120]. on the x-axis and 2) the mean on the
y-axis. A marker’s color and shape indicate the bank’s channel and pseudo
channel, respectively.

Figure 6: $BER$ variation across banks. Each bank is represented by the
average BER (y-axis) and the coefficient of variation in BER (x-axis) across
the rows within the bank.

We make two major observations. First, there is variation in $BER$ across
banks and pseudo channels. For example, there is up to 0.23% difference in
mean $BER$ across banks in channel 7. Second, $BER$ variation across banks is
dominated by variation across channels. Banks in different channels tend to
have a larger $BER$ difference than banks in the same channel (Fig. 3). We
conclude that testing different channels is more important than testing
different banks or pseudo channels to assess the RH vulnerability of a given
HBM2 DRAM chip.

Summary. We summarize the two key takeaways of our spatial variation study.
First, different 3D-stacked channels of the HBM2 DRAM chip exhibit
significantly different levels of RH vulnerability in terms of $BER$ (up to
$79\text{\,}\mathrm{\char 37\relax}$) and $HC_{first}$ (up to
$20\text{\,}\mathrm{\char 37\relax}$). Second, DRAM rows near the end of a
DRAM bank exhibit substantially smaller $BER$ than other DRAM rows on average
across all HBM2 DRAM channels. Our key takeaways have two implications for RH
attacks and defenses. First, an RH attack can use the most-RH-vulnerable HBM2
channel to reduce the time it spends on i) _preparing_ for an attack, by
finding exploitable RH bitflips faster (i.e., by accelerating memory
templating), and ii) _performing_ the attack, by benefiting from a small
$HC_{first}$ value. Second, an RH defense mechanism can adapt itself to the
heterogeneous distribution of the RH vulnerability across channels and
subarrays, which may allow the defense mechanism to more efficiently prevent
RH bitflips.

##  5 Uncovering in-DRAM RH Mitigations

To prevent RH bitflips, DRAM manufacturers equip their chips with a mitigation
mechanism broadly referred to as Target Row Refresh (TRR) [64, 25, 91].
Proprietary versions of TRR (e.g., in DDR4) operate transparently from the
perspective of the memory controller. At a high level, TRR identifies
potential aggressor rows and preventively refreshes their victim rows upon
receiving a $REF$ command. We demonstrate that the tested chip implements a
proprietary TRR (similar to the ones used in DDR4 [64, 121]) in addition to
the TRR mode documented in the HBM2 standard [90].

Methodology. We use the U-TRR methodology [64, 121] to uncover the proprietary
TRR mechanism. The key idea of this methodology is to use retention failures
as a side channel to infer whether or not TRR refreshes a DRAM row.

One iteration of our experiment consists of six steps. First, we profile a row
(R) to find its retention time (T), after which retention errors accumulate in
row R unless row R is refreshed. Second, we activate and precharge row R once
(i.e., refresh it) and wait for T/2. Third, we activate and precharge row R+1.
We hypothesize that if the HBM2 chip implements an undisclosed TRR mechanism,
it will sample the activation of R+1 and refresh the neighboring rows (i.e.,
row R) once a periodic $REF$ command triggers TRR. Fourth, to trigger the TRR
mechanism, we issue a periodic $REF$ command. Fifth, we wait for another T/2
such that if TRR does _not_ refresh row R, it will exhibit retention errors.
Sixth, we check row R for bitflips to see if _any_ TRR refresh occurred (i.e.,
if there are _no_ bitflips). We perform 100 iterations of this experiment to
check if TRR refreshes the victim row R.

Results. We observe that the profiled row (R) is refreshed _once_ every _17_
iterations. Therefore, we conclude that i) the tested HBM2 DRAM chip
implements a proprietary, undisclosed TRR mechanism, and ii) this TRR
mechanism performs a victim row refresh once every 17 periodic $REF$ commands,
resembling a TRR mechanism that U-TRR [64, 121] uncovers in DRAM chips from
_Vendor C_. We intend to uncover more details of the proprietary TRR mechanism
as part of future work.

##  6 Future Work

This work presents the results of our RH characterization study on a real HBM2
DRAM chip. We plan to present more insights into how RH behaves in real HBM2
DRAM chips by strengthening our characterization study at least in the
following three directions.

1) Testing more HBM chips. We intend to repeat our experiments on a larger
number of HBM2 chips to improve the statistical significance of our
observations.

2) More characterization for each HBM chip. We plan to understand RH’s
sensitivities to multiple other factors. We will investigate how RH varies: 1)
across different stacks in HBM2 chips, 2) based on the time an aggressor row
remains active [14], 3) based on a richer set of data patterns used in
initializing victim and aggressor rows, and 4) across different HBM2 voltage
and temperature levels. We also intend to study the effect of RowPress [110].

3) Investigating cross-channel interference. HBM2 chips stack DRAM dies such
that certain HBM channels are placed on top of each other. We aim to
investigate if frequently accessing one or more _aggressor channels_ can
induce bitflips or worsen the reliability characteristics of other _victim
channels_.

##  7 Related Work

We present the first experimental characterization of the RowHammer (RH)
vulnerability in a modern HBM2 DRAM chip. Prior works [1, 6, 7, 8, 9, 10, 11,
12, 13, 4, 14, 15, 16, 17, 18, 19, 20, 21, 22, 5, 23, 24, 25, 2, 26, 27]
analyze new aspects of the RH vulnerability by testing real DDR3/4 DRAM chips.
Other prior works [122, 123, 124] characterize real HBM chips to understand
their i) soft error resiliency [124], ii) performance and reliability
characteristics under reduced voltage [122], and iii) susceptibility to
retention failures at different temperatures [123]. No prior work investigates
the RowHammer vulnerability in a real HBM chip.

##  8 Conclusion

We present the results of our detailed characterization study of the RowHammer
(RH) vulnerability in a modern HBM2 chip. We show that the RH vulnerability is
heterogeneously distributed across various components in the HBM2 chip, which
we believe has important implications for future RH attacks and defenses. We
discover that the HBM2 chip implements a proprietary RH mitigation mechanism
and explain how the mitigation mechanism works. We hope and expect that our
findings will lead to a deeper understanding of and new solutions to the RH
vulnerability in HBM-based systems.

## Acknowledgments

We thank the anonymous reviewers of DSN 2023 Disrupt for feedback. We thank
the SAFARI Research Group members for valuable feedback and the stimulating
scientific and intellectual environment they provide. We acknowledge the
generous gift funding provided by our industrial partners (especially Google,
Huawei, Intel, Microsoft, VMware), which has been instrumental in enabling the
decade-long research we have been conducting on read disturbance in DRAM. This
work was in part supported by the Google Security and Privacy Research Award
and the Microsoft Swiss Joint Research Center.

## References

  * [1] Y. Kim, R. Daly, J. Kim, C. Fallin, J. H. Lee, D. Lee, C. Wilkerson, K. Lai, and O. Mutlu.  Flipping Bits in Memory Without Accessing Them: An Experimental Study of DRAM Disturbance Errors.  In ISCA, 2014.
  * [2] Onur Mutlu.  The RowHammer Problem and Other Issues We May Face as Memory Becomes Denser.  In DATE, 2017.
  * [3] Onur Mutlu and Jeremie Kim.  RowHammer: A Retrospective.  IEEE TCAD Special Issue on Top Picks in Hardware and Embedded Security, 2019.
  * [4] Jeremie S. Kim, Minesh Patel, Abdullah Giray Yağlıkcı, Hasan Hassan, Roknoddin Azizi, Lois Orosa, and Onur Mutlu.  Revisiting RowHammer: An Experimental Analysis of Modern Devices and Mitigation Techniques.  In ISCA, 2020.
  * [5] Onur Mutlu, Ataberk Olgun, and A. Giray Yaglikci.  Fundamentally Understanding and Solving RowHammer.  In ASP-DAC, 2023.
  * [6] Kyungbae Park, Donghyuk Yun, and Sanghyeon Baeg.  Statistical Distributions of Row-hammering Induced Failures in DDR3 Components.  Microelectronics Reliability, 2016.
  * [7] Kyungbae Park, Chulseung Lim, Donghyuk Yun, and Sanghyeon Baeg.  Experiments and Root Cause Analysis for Active-precharge Hammering Fault in DDR3 SDRAM under 3$\times$ nm Technology.  Microelectronics Reliability, 2016.
  * [8] Chulseung Lim, Kyungbae Park, and Sanghyeon Baeg.  Active Precharge Hammering to Monitor Displacement Damage Using High-Energy Protons in 3x-nm SDRAM.  TNS, 2017.
  * [9] Seong-Wan Ryu, Kyungkyu Min, Jungho Shin, Heimi Kwon, Donghoon Nam, Taekyung Oh, Tae-Su Jang, Minsoo Yoo, Yongtaik Kim, and Sungjoo Hong.  Overcoming the Reliability Limitation in the Ultimately Scaled DRAM using Silicon Migration Technique by Hydrogen Annealing.  In IEDM, 2017.
  * [10] Chulseung Lim, Kyungbae Park, Geunyong Bak, Donghyuk Yun, Myungsang Park, Sanghyeon Baeg, Shi-Jie Wen, and Richard Wong.  Study of Proton Radiation Effect to Row Hammer Fault in DDR4 SDRAMs.  Microelectronics Reliability, 2018.
  * [11] Donghyuk Yun, Myungsang Park, Chulseung Lim, and Sanghyeon Baeg.  Study of TID Effects on One Row Hammering using Gamma in DDR4 SDRAMs.  In IRPS, 2018.
  * [12] Thomas Yang and Xi-Wei Lin.  Trap-Assisted DRAM Row Hammer Effect.  EDL, 2019.
  * [13] Andrew J. Walker, Sungkwon Lee, and Dafna Beery.  On DRAM RowHammer and the Physics on Insecurity.  IEEE TED, 2021.
  * [14] Lois Orosa, A Giray Yağlıkcı, Haocong Luo, Ataberk Olgun, Jisung Park, Hasan Hassan, Minesh Patel, Jeremie S. Kim, and Onur Mutlu.  A Deeper Look into RowHammer’s Sensitivities: Experimental Analysis of Real DRAM Chips and Implications on Future Attacks and Defenses.  In MICRO, 2021.
  * [15] Lois Orosa, Ulrich Rührmair, A Giray Yaglikci, Haocong Luo, Ataberk Olgun, Patrick Jattke, Minesh Patel, Jeremie Kim, Kaveh Razavi, and Onur Mutlu.  SpyHammer: Using RowHammer to Remotely Spy on Temperature.  arXiv:2210.04084, 2022.
  * [16] Yaakov Cohen, Kevin Sam Tharayil, Arie Haenel, Daniel Genkin, Angelos D Keromytis, Yossi Oren, and Yuval Yarom.  HammerScope: Observing DRAM Power Consumption Using Rowhammer.  In CCS, 2022.
  * [17] A. Giray Yağlıkcı, Haocong Luo, Geraldo F De Oliviera, Ataberk Olgun, Minesh Patel, Jisung Park, Hasan Hassan, Jeremie S Kim, Lois Orosa, and Onur Mutlu.  Understanding RowHammer Under Reduced Wordline Voltage: An Experimental Study Using Real DRAM Devices.  In DSN, 2022.
  * [18] Mohammad Nasim Imtiaz Khan and Swaroop Ghosh.  Analysis of Row Hammer Attack on STTRAM.  In ICCD, 2018.
  * [19] S. Agarwal, H. Dixit, D. Datta, M. Tran, D. Houssameddine, D. Shum, and F. Benistant.  Rowhammer for Spin Torque based Memory: Problem or not?  In INTERMAG, 2018.
  * [20] Haitong Li, Hong-Yu Chen, Zhe Chen, Bing Chen, Rui Liu, Gang Qiu, Peng Huang, Feifei Zhang, Zizhen Jiang, Bin Gao, Lifeng Liu, Xiaoyan Liu, Shimeng Yu, H.-S. Philip Wong, and Jinfeng Kang.  Write Disturb Analyses on Half-Selected Cells of Cross-Point RRAM Arrays.  In IRPS, 2014.
  * [21] Kai Ni, Xueqing Li, Jeffrey A. Smith, Matthew Jerry, and Suman Datta.  Write Disturb in Ferroelectric FETs and Its Implication for 1T-FeFET AND Memory Arrays.  IEEE EDL, 2018.
  * [22] Paul R. Genssler, Victor M. van Santen, Jörg Henkel, and Hussam Amrouch.  On the Reliability of FeFET On-Chip Memory.  TC, 2022.
  * [23] Wei He, Zhi Zhang, Yueqiang Cheng, Wenhao Wang, Wei Song, Yansong Gao, Qifei Zhang, Kang Li, Dongxi Liu, and Surya Nepal.  WhistleBlower: A System-level Empirical Study on RowHammer.  IEEE Transactions on Computers, 2023.
  * [24] Sanghyeon Baeg, Donghyuk Yun, Myungsun Chun, and Shi-Jie Wen.  Estimation of the Trap Energy Characteristics of Row Hammer-Affected Cells in Gamma-Irradiated DDR4 DRAM.  IEEE Transactions on Nuclear Science, 2022.
  * [25] Pietro Frigo, Emanuele Vannacci, Hasan Hassan, Victor van der Veen, Onur Mutlu, Cristiano Giuffrida, Herbert Bos, and Kaveh Razavi.  TRRespass: Exploiting the Many Sides of Target Row Refresh.  In S&P, 2020.
  * [26] Onur Mutlu.  RowHammer.  https://people.inf.ethz.ch/omutlu/pub/onur-Rowhammer-TopPicksinHardwareEmbeddedSecurity-November-8-2018.pdf, 2018\.  Top Picks in Hardware and Embedded Security.
  * [27] Onur Mutlu.  RowHammer and Beyond.  In COSADE, 2019.
  * [28] Apostolos P Fournaris, Lidia Pocero Fraile, and Odysseas Koufopavlou.  Exploiting Hardware Vulnerabilities to Attack Embedded System Devices: A Survey of Potent Microarchitectural Attacks.  Electronics, 2017.
  * [29] Damian Poddebniak, Juraj Somorovsky, Sebastian Schinzel, Manfred Lochter, and Paul Rösler.  Attacking Deterministic Signature Schemes using Fault Attacks.  In EuroS&P, 2018.
  * [30] Andrei Tatar, Radhesh Krishnan Konoth, Elias Athanasopoulos, Cristiano Giuffrida, Herbert Bos, and Kaveh Razavi.  Throwhammer: Rowhammer Attacks Over the Network and Defenses.  In USENIX ATC, 2018.
  * [31] Sebastien Carre, Matthieu Desjardins, Adrien Facon, and Sylvain Guilley.  OpenSSL Bellcore’s Protection Helps Fault Attack.  In DSD, 2018.
  * [32] Alessandro Barenghi, Luca Breveglieri, Niccolò Izzo, and Gerardo Pelosi.  Software-only Reverse Engineering of Physical DRAM Mappings for Rowhammer Attacks.  In IVSW, 2018.
  * [33] Zhenkai Zhang, Zihao Zhan, Daniel Balasubramanian, Xenofon Koutsoukos, and Gabor Karsai.  Triggering Rowhammer Hardware Faults on ARM: A Revisit.  In ASHES, 2018.
  * [34] Sarani Bhattacharya and Debdeep Mukhopadhyay.  Advanced Fault Attacks in Software: Exploiting the Rowhammer Bug.  In Fault Tolerant Architectures for Cryptography and Hardware Security. 2018.
  * [35] Mark Seaborn and Thomas Dullien.  Exploiting the DRAM Rowhammer Bug to Gain Kernel Privileges.  http://googleprojectzero.blogspot.com.tr/2015/03/exploiting-dram-rowhammer-bug-to-gain.html, 2015\.
  * [36] SAFARI Research Group.  RowHammer — GitHub Repository.  https://github.com/CMU-SAFARI/rowhammer, 2014.
  * [37] Mark Seaborn and Thomas Dullien.  Exploiting the DRAM Rowhammer Bug to Gain Kernel Privileges.  Black Hat, 2015.
  * [38] Victor van der Veen, Yanick Fratantonio, Martina Lindorfer, Daniel Gruss, Clementine Maurice, Giovanni Vigna, Herbert Bos, Kaveh Razavi, and Cristiano Giuffrida.  Drammer: Deterministic Rowhammer Attacks on Mobile Platforms.  In CCS, 2016.
  * [39] Daniel Gruss, Clémentine Maurice, and Stefan Mangard.  Rowhammer.js: A Remote Software-Induced Fault Attack in Javascript.  In DIMVA, 2016.
  * [40] Kaveh Razavi, Ben Gras, Erik Bosman, Bart Preneel, Cristiano Giuffrida, and Herbert Bos.  Flip Feng Shui: Hammering a Needle in the Software Stack.  In USENIX Security, 2016.
  * [41] Peter Pessl, Daniel Gruss, Clémentine Maurice, Michael Schwarz, and Stefan Mangard.  DRAMA: Exploiting DRAM Addressing for Cross-CPU Attacks.  In USENIX Security, 2016.
  * [42] Yuan Xiao, Xiaokuan Zhang, Yinqian Zhang, and Radu Teodorescu.  One Bit Flips, One Cloud Flops: Cross-VM Row Hammer Attacks and Privilege Escalation.  In USENIX Security, 2016.
  * [43] Erik Bosman, Kaveh Razavi, Herbert Bos, and Cristiano Giuffrida.  Dedup Est Machina: Memory Deduplication as An Advanced Exploitation Vector.  In S&P, 2016.
  * [44] Sarani Bhattacharya and Debdeep Mukhopadhyay.  Curious Case of RowHammer: Flipping Secret Exponent Bits using Timing Analysis.  In CHES, 2016.
  * [45] Wayne Burleson, Onur Mutlu, and Mohit Tiwari.  Invited: Who is the Major Threat to Tomorrow’s Security? You, the Hardware Designer.  In DAC, 2016.
  * [46] Rui Qiao et al.  A New Approach for RowHammer Attacks.  In HOST, 2016.
  * [47] Ferdinand Brasser, Lucas Davi, David Gens, Christopher Liebchen, and Ahmad-Reza Sadeghi.  Can’t Touch This: Software-Only Mitigation Against Rowhammer Attacks Targeting Kernel Memory.  In USENIX Security, 2017.
  * [48] Yeongjin Jang, Jaehyuk Lee, Sangho Lee, and Taesoo Kim.  SGX-Bomb: Locking Down the Processor via Rowhammer Attack.  In SysTEX, 2017.
  * [49] Misiker Tadesse Aga, Zelalem Birhanu Aweke, and Todd Austin.  When Good Protections Go Bad: Exploiting Anti-DoS Measures to Accelerate Rowhammer Attacks.  In HOST, 2017.
  * [50] Andrei Tatar, Cristiano Giuffrida, Herbert Bos, and Kaveh Razavi.  Defeating Software Mitigations Against Rowhammer: A Surgical Precision Hammer.  In RAID, 2018.
  * [51] Daniel Gruss, Moritz Lipp, Michael Schwarz, Daniel Genkin, Jonas Juffinger, Sioli O’Connell, Wolfgang Schoechl, and Yuval Yarom.  Another Flip in the Wall of Rowhammer Defenses.  In S&P, 2018.
  * [52] Moritz Lipp, Misiker Tadesse Aga, Michael Schwarz, Daniel Gruss, Clémentine Maurice, Lukas Raab, and Lukas Lamster.  Nethammer: Inducing Rowhammer Faults Through Network Requests.  arXiv:1805.04956, 2018.
  * [53] Victor van der Veen, Martina Lindorfer, Yanick Fratantonio, Harikrishnan Padmanabha Pillai, Giovanni Vigna, Christopher Kruegel, Herbert Bos, and Kaveh Razavi.  GuardION: Practical Mitigation of DMA-Based Rowhammer Attacks on ARM.  In DIMVA, 2018.
  * [54] Pietro Frigo, Cristiano Giuffrida, Herbert Bos, and Kaveh Razavi.  Grand Pwning Unit: Accelerating Microarchitectural Attacks with the GPU.  In S&P, 2018.
  * [55] Lucian Cojocar, Kaveh Razavi, Cristiano Giuffrida, and Herbert Bos.  Exploiting Correcting Codes: On the Effectiveness of ECC Memory Against Rowhammer Attacks.  In S&P, 2019.
  * [56] Sangwoo Ji, Youngjoo Ko, Saeyoung Oh, and Jong Kim.  Pinpoint Rowhammer: Suppressing Unwanted Bit Flips on Rowhammer Attacks.  In ASIACCS, 2019.
  * [57] Sanghyun Hong, Pietro Frigo, Yiğitcan Kaya, Cristiano Giuffrida, and Tudor Dumitras.  Terminal Brain Damage: Exposing the Graceless Degradation in Deep Neural Networks Under Hardware Fault Attacks.  In USENIX Security, 2019.
  * [58] Andrew Kwong, Daniel Genkin, Daniel Gruss, and Yuval Yarom.  RAMBleed: Reading Bits in Memory Without Accessing Them.  In S&P, 2020.
  * [59] Lucian Cojocar, Jeremie Kim, Minesh Patel, Lillian Tsai, Stefan Saroiu, Alec Wolman, and Onur Mutlu.  Are We Susceptible to Rowhammer? An End-to-End Methodology for Cloud Providers.  In S&P, 2020.
  * [60] Zane Weissman, Thore Tiemann, Daniel Moghimi, Evan Custodio, Thomas Eisenbarth, and Berk Sunar.  JackHammer: Efficient Rowhammer on Heterogeneous FPGA–CPU Platforms.  arXiv:1912.11523, 2020.
  * [61] Zhi Zhang, Yueqiang Cheng, Dongxi Liu, Surya Nepal, Zhi Wang, and Yuval Yarom.  PTHammer: Cross-User-Kernel-Boundary Rowhammer Through Implicit Accesses.  In MICRO, 2020.
  * [62] Fan Yao, Adnan Siraj Rakin, and Deliang Fan.  Deephammer: Depleting the Intelligence of Deep Neural Networks Through Targeted Chain of Bit Flips.  In USENIX Security, 2020.
  * [63] Finn de Ridder, Pietro Frigo, Emanuele Vannacci, Herbert Bos, Cristiano Giuffrida, and Kaveh Razavi.  SMASH: Synchronized Many-Sided Rowhammer Attacks from JavaScript.  In USENIX Security, 2021.
  * [64] Hasan Hassan, Yahya Can Tugrul, Jeremie S. Kim, Victor van der Veen, Kaveh Razavi, and Onur Mutlu.  Uncovering In-DRAM RowHammer Protection Mechanisms: A New Methodology, Custom RowHammer Patterns, and Implications.  In MICRO, 2021.
  * [65] Patrick Jattke, Victor van der Veen, Pietro Frigo, Stijn Gunter, and Kaveh Razavi.  Blacksmith: Scalable Rowhammering in the Frequency Domain.  In S&P, 2022.
  * [66] M Caner Tol, Saad Islam, Berk Sunar, and Ziming Zhang.  Toward Realistic Backdoor Injection Attacks on DNNs using RowHammer.  arXiv:2110.07683, 2022.
  * [67] Andreas Kogler, Jonas Juffinger, Salman Qazi, Yoongu Kim, Moritz Lipp, Nicolas Boichat, Eric Shiu, Mattias Nissler, and Daniel Gruss.  Half-Double: Hammering From the Next Row Over.  In USENIX Security, 2022.
  * [68] Zhi Zhang, Wei He, Yueqiang Cheng, Wenhao Wang, Yansong Gao, Dongxi Liu, Kang Li, Surya Nepal, Anmin Fu, and Yi Zou.  Implicit Hammer: Cross-Privilege-Boundary Rowhammer through Implicit Accesses.  IEEE TDSC, 2022.
  * [69] Liang Liu, Yanan Guo, Yueqiang Cheng, Youtao Zhang, and Jun Yang.  Generating Robust DNN with Resistance to Bit-Flip based Adversarial Weight Attack.  IEEE TC, 2022.
  * [70] Mengxin Zheng, Qian Lou, and Lei Jiang.  TrojViT: Trojan Insertion in Vision Transformers.  arXiv:2208.13049, 2022.
  * [71] Michael Fahr Jr, Hunter Kippen, Andrew Kwong, Thinh Dang, Jacob Lichtinger, Dana Dachman-Soled, Daniel Genkin, Alexander Nelson, Ray Perlner, Arkady Yerukhimovich, et al.  When Frodo Flips: End-to-End Key Recovery on FrodoKEM via Rowhammer.  CCS, 2022.
  * [72] Youssef Tobah, Andrew Kwong, Ingab Kang, Daniel Genkin, and Kang G. Shin.  SpecHammer: Combining Spectre and Rowhammer for New Speculative Attacks.  In S&P, 2022.
  * [73] Adnan Siraj Rakin, Md Hafizul Islam Chowdhuryy, Fan Yao, and Deliang Fan.  DeepSteal: Advanced Model Extractions Leveraging Efficient Weight Stealing in Memories.  In S&P, 2022.
  * [74] Hakan Aydin and Ahmet Sertbaş.  Cyber Security in Industrial Control Systems (ICS): A Survey of RowHammer Vulnerability.  Applied Computer Science, 2022.
  * [75] Koksal Mus, Yarkın Doröz, M Caner Tol, Kristi Rahman, and Berk Sunar.  Jolt: Recovering TLS Signing Keys via Rowhammer Faults.  Cryptology ePrint Archive, 2022.
  * [76] Jianxin Wang, Hongke Xu, Chaoen Xiao, Lei Zhang, and Yuzheng Zheng.  Research and Implementation of Rowhammer Attack Method based on Domestic NeoKylin Operating System.  In ICFTIC, 2022.
  * [77] Sam Lefforge.  Reverse Engineering Post-Quantum Cryptography Schemes to Find Rowhammer Exploits.  Bachelor’s Thesis, University of Arkansas, 2023.
  * [78] Michael Jacob Fahr.  The Effects of Side-Channel Attacks on Post-Quantum Cryptography: Influencing FrodoKEM Key Generation Using the Rowhammer Exploit.  2022\.
  * [79] Anandpreet Kaur, Pravin Srivastav, and Bibhas Ghoshal.  Work-in-Progress: DRAM-MaUT: DRAM Address Mapping Unveiling Tool for ARM Devices.  In CASES, 2022.
  * [80] Kunbei Cai, Zhenkai Zhang, and Fan Yao.  On the Feasibility of Training-time Trojan Attacks through Hardware-based Faults in Memory.  In HOST, 2022.
  * [81] Dawei Li, Di Liu, Yangkun Ren, Ziyi Wang, Yu Sun, Zhenyu Guan, Qianhong Wu, and Jianwei Liu.  CyberRadar: A PUF-based Detecting and Mapping Framework for Physical Devices.  arXiv:2201.07597, 2022.
  * [82] Arman Roohi and Shaahin Angizi.  Efficient Targeted Bit-Flip Attack Against the Local Binary Pattern Network.  In HOST, 2022.
  * [83] Felix Staudigl, Hazem Al Indari, Daniel Schön, Dominik Sisejkovic, Farhad Merchant, Jan Moritz Joseph, Vikas Rana, Stephan Menzel, and Rainer Leupers.  NeuroHammer: Inducing Bit-Flips in Memristive Crossbar Memories.  In DATE, 2022.
  * [84] Li-Hsing Yang, Shin-Shan Huang, Tsai-Ling Cheng, Yi-Ching Kuo, and Jian-Jhih Kuo.  Socially-Aware Collaborative Defense System against Bit-Flip Attack in Social Internet of Things and Its Online Assignment Optimization.  In ICCCN, 2022.
  * [85] Saad Islam, Koksal Mus, Richa Singh, Patrick Schaumont, and Berk Sunar.  Signature Correction Attack on Dilithium Signature Scheme.  In Euro S&P, 2022.
  * [86] Ali Bakhoda, George L. Yuan, Wilson W. L. Fung, Henry Wong, and Tor M. Aamodt.  Analyzing CUDA Workloads Using a Detailed GPU Simulator.  In ISPASS, 2009.
  * [87] Shuai Che, Michael Boyer, Jiayuan Meng, David Tarjan, Jeremy W. Sheaffer, Sang-Ha Lee, and Kevin Skadron.  Rodinia: A Benchmark Suite for Heterogeneous Computing.  In IISWC, 2009.
  * [88] Juan Gómez-Luna, Izzat El Hajj, Li-Wen Chang, Victor García-Floreszx, Simon Garcia De Gonzalo, Thomas B Jablin, Antonio J Pena, and Wen-mei Hwu.  Chai: Collaborative Heterogeneous Applications for Integrated-Architectures.  In ISPASS, 2017.
  * [89] Saugata Ghose, Tianshi Li, Nastaran Hajinazar, Damla Senol Cali, and Onur Mutlu.  Demystifying Complex Workload–DRAM Interactions: An Experimental Study.  In SIGMETRICS, 2019.
  * [90] JEDEC.  JESD235D: High Bandwidth Memory DRAM (HBM1, HBM2), 2021.
  * [91] Micron.  DDR4 SDRAM Datasheet.  In Micron, page 380, 2016.
  * [92] James Michael O’Connor.  Energy Efficient High Bandwidth DRAM for Throughput Processors.  PhD thesis, UT Austin, 2021.
  * [93] Y. Kim et al.  A case for subarray-level parallelism (SALP) in DRAM.  In ISCA, 2012.
  * [94] Vivek Seshadri, Yoongu Kim, Chris Fallin, Donghyuk Lee, Rachata Ausavarungnirun, Gennady Pekhimenko, Yixin Luo, Onur Mutlu, Phillip B Gibbons, Michael A Kozuch, and Todd Mowry.  RowClone: Fast and Energy-Efficient In-DRAM Bulk Data Copy and Initialization.  In MICRO, 2013.
  * [95] Kevin K Chang, Donghyuk Lee, Zeshan Chishti, Alaa R Alameldeen, Chris Wilkerson, Yoongu Kim, and Onur Mutlu.  Improving DRAM Performance by Parallelizing Refreshes with Accesses.  In HPCA, 2014.
  * [96] Ataberk Olgun, Hasan Hassan, A. Giray Yağlıkcı, Yahya Can Tuğrul, Lois Orosa, Haocong Luo, Minesh Patel, Ergin Oğuz, and Onur Mutlu.  DRAM Bender: An Extensible and Versatile FPGA-based Infrastructure to Easily Test State-of-the-art DRAM Chips.  arXiv:2211.05838, 2022.
  * [97] SAFARI Research Group.  DRAM Bender — GitHub Repository.  https://github.com/CMU-SAFARI/DRAM-Bender, 2022.
  * [98] Hasan Hassan, Nandita Vijaykumar, Samira Khan, Saugata Ghose, Kevin Chang, Gennady Pekhimenko, Donghyuk Lee, Oguz Ergin, and Onur Mutlu.  SoftMC: A Flexible and Practical Open-Source Infrastructure for Enabling Experimental DRAM Studies.  In HPCA, 2017.
  * [99] SAFARI Research Group.  SoftMC — GitHub Repository.  https://github.com/CMU-SAFARI/softmc, 2017.
  * [100] Bittware XUPVVH FPGA Board.  https://www.bittware.com/fpga/xup-vvh/.
  * [101] Arduino MEGA Documentation.  https://docs.arduino.cc/hardware/mega-2560/.
  * [102] Jamie Liu, Ben Jaiyen, Yoongu Kim, Chris Wilkerson, Onur Mutlu, J Liu, B Jaiyen, Y Kim, C Wilkerson, and O Mutlu.  An Experimental Study of Data Retention Behavior in Modern DRAM Devices.  In ISCA, 2013.
  * [103] Samira Khan, Donghyuk Lee, Yoongu Kim, Alaa R Alameldeen, Chris Wilkerson, and Onur Mutlu.  The Efficacy of Error Mitigation Techniques for DRAM Retention Failures: A Comparative Experimental Study.  In SIGMETRICS, 2014.
  * [104] Samira Khan, Donghyuk Lee, and Onur Mutlu.  PARBOR: An Efficient System-Level Technique to Detect Data-Dependent Failures in DRAM.  In DSN, 2016.
  * [105] M.K. Qureshi, Dae-Hyun Kim, S. Khan, P.J. Nair, and O. Mutlu.  AVATAR: A Variable-Retention-Time (VRT) Aware Refresh for DRAM Systems.  In DSN, 2015.
  * [106] Minesh Patel, Jeremie S Kim, and Onur Mutlu.  The Reach Profiler (REAPER): Enabling the Mitigation of DRAM Retention Failures via Profiling at Aggressive Conditions.  In ISCA, 2017.
  * [107] Minesh Patel, Jeremie S. Kim, Hasan Hassan, and Onur Mutlu.  Understanding and Modeling On-Die Error Correction in Modern DRAM: An Experimental Study Using Real Devices.  In DSN, 2019.
  * [108] Minesh Patel, Jeremie Kim, Taha Shahroodi, Hasan Hassan, and Onur Mutlu.  Bit-Exact ECC Recovery (BEER): Determining DRAM On-Die ECC Functions by Exploiting DRAM Data Retention Characteristics.  In MICRO, 2020.
  * [109] Minesh Patel, Geraldo Francisco de Oliveira Jr., and Onur Mutlu.  HARP: Practically and Effectively Identifying Uncorrectable Errors in Main Memory Chips That Use On-Die ECC.  In MICRO, 2021.
  * [110] Haocong Luo, Ataberk Olgun, Abdullah Giray Yağlıkcı, Yahya Can Tuğrul, Steve Rhyner, Meryem Banu Cavlak, Joël Lindegger, Mohammad Sadrosadati, and Onur Mutlu.  RowPress: Amplifying Read Disturbance in Modern DRAM Chips.  In ISCA, 2023.
  * [111] Robert T Smith, James D Chlipala, JOHN FM Bindels, Roy G Nelson, Frederick H Fischer, and Thomas F Mantz.  Laser Programmable Redundancy and Yield Improvement in a 64K DRAM.  JSSC, 1981.
  * [112] Masashi Horiguchi.  Redundancy Techniques for High-Density DRAMs.  In ISIS, 1997.
  * [113] B. Keeth and R.J. Baker.  DRAM Circuit Design: A Tutorial.  Wiley, 2001.
  * [114] Kiyoo Itoh.  VLSI Memory Chip Design.  Springer, 2001.
  * [115] Vivek Seshadri, Thomas Mullins, Amirali Boroumand, Onur Mutlu, Phillip B Gibbons, Michael A Kozuch, and Todd C Mowry.  Gather-Scatter DRAM: In-DRAM Address Translation to Improve the Spatial Locality of Non-Unit Strided Accesses.  In MICRO, 2015.
  * [116] Samira Khan, Chris Wilkerson, Zhe Wang, Alaa R Alameldeen, Donghyuk Lee, and Onur Mutlu.  Detecting and Mitigating Data-Dependent DRAM Failures by Exploiting Current Memory Content.  In MICRO, 2017.
  * [117] Donghyuk Lee, Samira Khan, Lavanya Subramanian, Saugata Ghose, Rachata Ausavarungnirun, Gennady Pekhimenko, Vivek Seshadri, and Onur Mutlu.  Design-induced Latency Variation in Modern DRAM Chips: Characterization, Analysis, and Latency Reduction Mechanisms.  POMACS, 2017.
  * [118] A. Giray Yağlıkcı, Minesh Patel, Jeremie S. Kim, Roknoddin Azizibarzoki, Ataberk Olgun, Lois Orosa, Hasan Hassan, Jisung Park, Konstantinos Kanellopoullos, Taha Shahroodi, Saugata Ghose, and Onur Mutlu.  BlockHammer: Preventing RowHammer at Low Cost by Blacklisting Rapidly-Accessed DRAM Rows.  In HPCA, 2021.
  * [119] Hongshin Jun, Jinhee Cho, Kangseol Lee, Ho-Young Son, Kwiwook Kim, Hanho Jin, and Keith Kim.  HBM (High Bandwidth Memory) DRAM Technology and Architecture.  In IMW, 2017.
  * [120] Everitt Biran.  The Cambridge Dictionary of Statistics.  Cambridge University Press, 1998.
  * [121] U-TRR.  https://github.com/CMU-SAFARI/u-trr, 2021.
  * [122] Seyed Saber Nabavi Larimi, Behzad Salami, Osman S. Unsal, Adrián Cristal Kestelman, Hamid Sarbazi-Azad, and Onur Mutlu.  Understanding Power Consumption and Reliability of High-Bandwidth Memory with Voltage Underscaling.  In DATE, 2021.
  * [123] Junhyeong Kwon, Shi-Jie Wen, Rita Fung, and Sanghyeon Baeg.  Temperature Estimation of HBM2 Channels with Tail Distribution of Retention Errors in FPGA-HBM2 Platform.  Electronics, 2023.
  * [124] Michael B. Sullivan, Nirmal Saxena, Mike O’Connor, Donghyuk Lee, Paul Racunas, Saurabh Hukerikar, Timothy Tsai, Siva Kumar Sastry Hari, and Stephen W. Keckler.  Characterizing And Mitigating Soft Errors in GPU DRAM.  In MICRO, 2021.