# Autonomous neural information processing by a dynamical memristor circuit

Dániel Molnár  Department of Physics, Institute of Physics, Budapest
University of Technology and Economics, Műegyetem rkp. 3, H-1111 Budapest,
Hungary  ELKH-BME Condensed Matter Research Group, Műegyetem rkp. 3, H-1111
Budapest, Hungary  Tímea Nóra Török  Department of Physics, Institute of
Physics, Budapest University of Technology and Economics, Műegyetem rkp. 3,
H-1111 Budapest, Hungary  Institute of Technical Physics and Materials
Science, Centre for Energy Research, Konkoly-Thege M. út 29-33, 1121 Budapest,
Hungary  Roland Kövecs  Department of Physics, Institute of Physics, Budapest
University of Technology and Economics, Műegyetem rkp. 3, H-1111 Budapest,
Hungary  László Pósa  Department of Physics, Institute of Physics, Budapest
University of Technology and Economics, Műegyetem rkp. 3, H-1111 Budapest,
Hungary  Institute of Technical Physics and Materials Science, Centre for
Energy Research, Konkoly-Thege M. út 29-33, 1121 Budapest, Hungary  Péter
Balázs  Department of Physics, Institute of Physics, Budapest University of
Technology and Economics, Műegyetem rkp. 3, H-1111 Budapest, Hungary  György
Molnár  Institute of Technical Physics and Materials Science, Centre for
Energy Research, Konkoly-Thege M. út 29-33, 1121 Budapest, Hungary  Nadia
Jimenez Olalla  Institute of Electromagnetic Fields, ETH Zurich, Gloriastrasse
35, 8092 Zurich, Switzerland  Juerg Leuthold  Institute of Electromagnetic
Fields, ETH Zurich, Gloriastrasse 35, 8092 Zurich, Switzerland  János Volk
Institute of Technical Physics and Materials Science, Centre for Energy
Research, Konkoly-Thege M. út 29-33, 1121 Budapest, Hungary  Miklós Csontos
Institute of Electromagnetic Fields, ETH Zurich, Gloriastrasse 35, 8092
Zurich, Switzerland  András Halbritter<EMAIL_ADDRESS>Department of Physics, Institute of Physics, Budapest University of Technology
and Economics, Műegyetem rkp. 3, H-1111 Budapest, Hungary  ELKH-BME Condensed
Matter Research Group, Műegyetem rkp. 3, H-1111 Budapest, Hungary

###### Abstract

Analog tunable memristors are widely utilized as artificial synapses in
various neural network applications. However, exploiting the dynamical aspects
of their conductance change to implement active neurons is still in its
infancy, awaiting the realization of efficient neural signal recognition
functionalities. Here we experimentally demonstrate an artificial neural
information processing unit that can detect a temporal pattern in a very noisy
environment, fire a single output spike upon successful detection and reset
itself in a fully unsupervised, autonomous manner. This circuit relies on the
dynamical operation of only two memristive blocks: a non-volatile Ta2O5 device
and a volatile VO2 unit. A fading functionality with exponentially tunable
memory time constant enables adaptive operation dynamics, which can be
tailored for the targeted temporal pattern recognition task. In the trained
circuit false input patterns only induce short-term variations. In contrast,
the desired signal activates long-term memory operation of the non-volatile
component, which triggers a firing output of the volatile block.

memristor, resistive switching, artificial neuron, edge computing, tantalum
pentoxide, vanadium dioxide

##  I Introduction

Due to their compact size and unsophisticated structure [1], low-energy
operation [2], high speed [3, 4, 5] and CMOS compatibility [6, 7, 8], the
applications of memristor synapses in artificial neural networks (ANNs) are
booming. Crossbar arrays [9] of nonvolatile memristors exhibiting multiple
resistive states with linear current-voltage [$I(V)$] characteristics [8, 10]
play a key role: The single devices represent the analog synaptic weights,
whereas the crossbar array grants the full connectivity between the
neighboring neural layers which are typically implemented by standard CMOS
circuits [11, 12]. Such hybrid CMOS-memristor architectures have been utilized
in various neuromorphic computing tasks from data classification [13, 14, 15]
to feature extraction [10, 16] and as field-programmable analog arrays [17].

Memristor-based synaptic layers efficiently accelerate ANN operation at low
energy costs. However, the recursive tuning of the synaptic weights during
training still generates extensive software overheads. Alternative approaches
exploit the dynamical properties of resistive switching phenomena such as the
resistance relaxation of volatile memristors [18, 19] or the exponential
dependence of the switching time on the bias voltage [20, 21] which
facilitates short-term/long-term learning and forgetting abilities [22, 23,
24]. As a common figure of merit, ANNs relying on dynamical memristor
operation require considerably less network nodes and trained synapses to
achieve the same computational efficiency as the more traditional deep neural
networks (DNNs) where merely the static properties of the memristors are
exploited.

The role of dynamical complexity in the nonlinear, and often adaptive current
response of memristors and their small circuits have been revealed recently
[25]. In a pioneering work, W. Yi et al. [26] have faithfully reproduced 23
known neural spiking patterns by utilizing the fourth-order dynamical
complexity facilitated by only two coupled VO2 memristors. As a next step
toward fully memristor-based, bio-realistic spiking neural networks (SNNs)
exhibiting unrivaled footprint, energy efficiency and computational power, the
exploration of such dynamical building blocks and the corresponding training
algorithms is imperative.

Figure 1: The concept of the neuron detector/transceiver circuit. (a) Block
diagram of the functionality of the circuit, in analogy with a biological
neuron. The red icon represents the nonvolatile Ta2O5 memristor whose tunable
resistive switching dynamics enables the discrimination between different
temporal input patterns. The blue icon stands for the volatile VO2 memristor
which emits a voltage spike when the desired pattern is detected. (b) Optical
image of the vertically stacked Ta/Ta2O5/Pt crosspoint device. The scale bar
corresponds to 50 $\mu$m. (c) Electron microscope image of the lateral
electrode arrangement on top of a VO2 layer. The scale bar is 1 $\mu$m. (d) A
representative bipolar current-voltage characteristics of the Ta2O5 memristor
measured with a triangular voltage signal of $V_{\rm drive}^{0}$=1.2 V and
$f_{\rm drive}$=500 Hz, with $R_{\rm s,T}$=1 k$\Omega$. (e) A representative
unipolar current-voltage characteristics of the VO2 memristor measured with a
triangle voltage signal of $V_{\rm drive}^{0}$=1.8 V and $f_{\rm drive}$=1 Hz,
with $R_{\rm s,V}$=1 k$\Omega$. (f) A single voltage spike output of the VO2
oscillator circuit shown in (g) in blue. (g) Schematics of the neuron
detector/transceiver circuit. The module highlighted in red / blue part is
responsible for the detector / spiking output functionalities. The lower and
upper dashed arrows symbolize the coupling between the two circuit parts and
the feedback of the output to the input, respectively. The values of the
passive components are given in the Methods section.

Here we demonstrate that a small dynamical circuit based on a single non-
volatile Ta2O5 memristor is sufficient to recognize specific temporal
patterns, such as neural voltage spikes, in a complex input stream. By the
application of a series resistor element and a negative offset voltage, a
memory time constant is introduced to the circuit. The exponentially broad
voltage-tunability of this time constant is the key enabling feature of
temporal data classification. Extending the circuit with a volatile memristor,
neural firing and reset functionalities are added. Our circuit has been shown
to operate reliably in very noisy environments, satisfying bio-realistic
and/or edge computing requirements. The crucial condition of operation is the
presetting of the memory time constant of the nonvolatile memristor. The
dynamical properties can be optimized to the specific input signal stream by
adjusting only one resistor value and one constant voltage offset. Thereby,
very power-efficient and robust, autonomous neuromorphic edge transceivers can
be realized and operated at negligible training costs.

##  II Results and discussion

Our report is organized as follows. First, the basic building blocks of our
autonomous signal detector circuit are introduced. Next, we demonstrate
through simulation and experiment, that by applying a negative offset voltage,
adjustable long-term/short-term memory can be implemented in a simple circuit
of a nonvolatile memristor and a series resistor. This variable memory effect
is utilized to distinguish between positive-signed sub-threshold / super-
threshold voltage pulses which induce a transition to a short-lived / long-
standing low resistance state (LRS) of the memristor, before the initial high
resistance state (HRS) is restored by the permanent negative offset voltage.
We show that the same concept can be applied also to reliably discriminate
Gaussian voltage pulses from random voltage noise of comparable amplitude.
Finally, we extend the above detector unit with (i) an oscillator circuit
based on a volatile Mott memristor and (ii) a feedback loop. Thereby we
realize a complete artificial neuron which emits a neural voltage spike upon
receiving a pre-defined temporal signal pattern.

### The architecture of the neuron circuit.

In our autonomous signal detection scheme we utilize a Ta/Ta2O5/Pt nonvolatile
memristor symbolized by the red icon in Fig. 1(a) and a VO2-based volatile
memristor denoted by the blue icon in Fig. 1(a). The former / latter device
was fabricated in a vertical crosspoint stack / planar electrode arrangement,
as illustrated in Fig. 1(b) and (c), respectively. Further details on the
device preparation are provided in the Methods section. A representative
current-voltage [$I(V)$] characteristics of the Ta2O5 device is shown in Fig.
1(d). It was measured in the setup highlighted in red in Fig. 1(g). The
$V_{\rm bias}^{\rm T}$ bias voltage corresponding to the voltage drop on the
memristor is calculated according to $V_{\rm bias}^{\rm T}=V_{\rm
drive}-I_{\rm T}\cdot R_{\rm s,T}$, where $R_{\rm s,T}$ is a series resistor
and $V_{\rm drive}$ is the triangular output of the voltage source. Positive
voltage refers to a higher potential on the Ta top electrode with respect to
the Pt bottom electrode. The hysteretic $I(V)$ trace corresponds to
filamentary type resistive switching [3, 27, 28] between metallic states in
the analog tunable 1 k$\Omega$ – 10 k$\Omega$ regime [8, 10, 29].

Figure 1(e) displays a typical $I(V)$ curve of the Au/VO2/Au memristor,
measured in series with the $R_{\rm s,V}$ resistor. This corresponds to
unipolar, volatile resistive switching due to a temperature and electric field
controlled Mott transition [30, 31]. In our work, the asymmetric layout and
the only 30 nm wide lateral gap of the Au electrodes grant a very small and,
thus, homogeneous active volume. A detailed experimental analysis and finite
element simulations of the device performance and resistive switching
mechanism can be found in Ref. [31]. In the experiments discussed later, the
circuit environment of the Au/VO2/Au memristor, highlighted in blue in Fig.
1(g), is further extended with the capacitor $C$ and the additional resistor
$R_{\rm L}$. These, together with the $R_{\rm s,V}$ resistor form a
conventional VO2 oscillation circuit [26]. Figure 1(f) illustrates a single
output voltage spike of the oscillator circuit.

Figure 1(g) summarizes the architecture of the complete neuron circuit where
the lower and upper dashed arrows symbolize the coupling of the input detector
and the output firing modules as well as the feedback of the output to the
input, respectively. The detailed circuit schematics, including the
instrumental implementation of the coupling and the feedback is provided in
the Methods section.

### The memory time constant of the detector circuit.

First, we provide an insight into the operation principle of our neural spike
detection scheme via numerical simulations. The key ingredient is the
exponential slowdown of the resistive switching as the $V_{\rm bias}^{\rm T}$
bias voltage is linearly decreased on the Ta/Ta2O5/Pt memristor. The
exponential voltage dependence of the $\tau$ resistive switching time constant
on the bias voltage is commonly known as the ‘voltage-time dilemma’ [20, 21].
It is a general figure of merit observed in a broad range of resistive
switching systems [32] which describes the dependence of the $I(V)$
characteristics or the pulsed switching response on the speed and voltage
amplitude of the driving signal.

In our simulations, we assume $\tau=10^{-\left(\left|V_{\rm bias}^{\rm
T}\right|-b\right)/a}$, where the $a$ and $b$ adjustable parameters describe
the voltage-dependent dynamical properties. When a time-dependent $V_{\rm
drive}(t)$ driving voltage is applied to the memristor and the $R_{\rm s,T}$
serial resistor, the voltage drop on the memristor is calculated as $V_{\rm
bias}^{\rm T}=V_{\rm drive}-I_{\rm T}\cdot R_{\rm s,T}$. The dynamics of the
system is determined by a minimal model according to the ${\rm d}x/{\rm
d}t=-x/\tau$ and ${\rm d}x/{\rm d}t=(1-x)/\tau$ differential equations for
positive/negative bias voltages, respectively. The $0\leq x\leq 1$ state
variable is related to the memristor resistance according to $R_{\rm
T}(t)=V_{\rm bias}^{\rm T}/I_{\rm T}=R_{\rm LRS}+\left(R_{\rm HRS}-R_{\rm
LRS}\right)\cdot x(t)$.

In a highly simplified physical picture, the variation of $x$ can be
associated with the voltage-controlled manipulation of the oxygen ion
concentration in the filamentary region of the Ta/Ta2O5/Pt memristor [25]. In
the initial HRS state ($R_{\rm HRS}$) the poorly conducting filamentary region
is saturated with oxygen ions ($x=1$). Due to the applied positive voltage the
mobile oxygen ions are removed from the active region at a rate which is
proportional both to the voltage-controlled time constant $\tau$ and the $\sim
x$ amount of oxygen ions in the filamentary region. Such a process results in
the decrease of the filament resistance and is self-terminated when all the
mobile oxygen ions are removed ($x=0$ and $R_{\rm T}=R_{\rm LRS}$). In
practice, however, the set process is rather limited by the serial resistance,
i.e., when $R_{\rm T}(t)$ becomes smaller than $R_{\rm s,T}$ the bias voltage
on the memristor decreases, meanwhile the voltage-dependent time constant
exponentially increases, and the set transition stops. At opposite voltage
polarity, the oxygen ions are actuated from the surrounding oxide matrix
towards the filamentary region, yielding an increase of the resistance. In
this case, the rate is again proportional to $\tau$, as well as the
$\sim(1-x)$ amount of the available mobile oxygen ions in the oxide.

### Simulated temporal pattern detection.

Using the above dynamical equations the response of the system to a time-
dependent driving voltage signal can be simulated. First, we calculate the
$I(V)$ curves at different $f_{\rm drive}$ frequencies and $V_{\rm drive}^{0}$
amplitudes of a triangular $V_{\rm drive}$. Next, we compare these to the
measured frequency-dependent $I(V)$ characteristics of our Ta2O5 memristor.
This comparison allows us to extract the actual, device-specific values of the
$a$ and $b$ model parameters (see Methods section for further details).
Adapting the latter into the simulation, the realistic voltage-dependent
dynamical properties of the Ta2O5 devices can be modeled.

In the simulations shown in Fig. 2 we apply positive-signed voltage pulses
superimposed at a constant negative voltage offset to the Ta2O5 memristor –
$R_{\rm s,T}$ circuit. Such a voltage driving scheme is displayed in Fig.
2(a). We demonstrate that thereby an adjustable long-term/short-term memory
can be introduced to the system. The Ta2O5 memristor is initialized in its HRS
and the $V_{\rm pulse}^{0}$ peak value and $T_{\rm pulse}$ duration of the
voltage pulses are selected such that they induce a resistive switching to the
LRS. In the LRS between the positive pulses the memristor is exposed to a
negative voltage bias which can be calculated as $V_{\rm bias}^{\rm T}=V_{\rm
offset}\cdot R_{\rm LRS}/\left(R_{\rm LRS}+R_{\rm s,T}\right)$. Note, that
here $V_{\rm offset}$ and $R_{\rm s,T}$ are adjustable variables, whereas
$R_{\rm LRS}$ can be fine-tuned by the appropriate combination of $V_{\rm
pulse}^{0}$ and $R_{\rm s,T}$, as explained earlier in this Section.

Figure 2: Simulation of the voltage-tunable short-term/long-term memory
induced in the Ta2O5 memristor. (a) The $V_{\rm drive}$ driving voltage signal
consists of positive voltage pulses of $V_{\rm pulse}^{0}$=1.75 V peak level,
$T_{\rm pulse}$=10 ms duration and 5 Hz repetition rate. Additionally, a
constant negative voltage offset of $V_{\rm offset}$ is applied. (b) The red
trace shows a short-term memory effect in the time dependence of the $R_{\rm
T}$ memristor resistance when a larger magnitude negative voltage offset of
$V_{\rm offset}$=-1.65 V is applied. The gray trace shows the time dependence
of the $V_{\rm bias}^{\rm T}=V_{\rm drive}-I_{\rm T}\cdot R_{\rm s,T}$ voltage
acting on the memristor. (c) The calculated time constant of the resistance
change corresponding to the short-term memory effect displayed in (b). (d) The
red trace shows a long-term memory effect in $R_{\rm T}$ when a lower
magnitude, $V_{\rm offset}$=-1.3 V negative voltage offset is applied while
all other parameters are identical to the settings in (b). The gray trace
shows the time dependence of the $V_{\rm bias}^{\rm T}$. (e) The calculated
time constant of the resistance change corresponding to the long-term memory
effect displayed in (d). (f) Simulated resistance response of the Ta2O5
memristor (red) to an input voltage signal (black) consisting of white noise
with 0.45 V rms / 3.6 V pp, a Gaussian voltage spike of $V_{\rm neural}^{0}$=
1.4 V amplitude and 10 ms width as well as a constant negative voltage offset
of $V_{\rm offset}$=-0.25 V (white dashed line). $R_{\rm s,T}$=1 k$\Omega$ in
all simulations.

Figure 2(b) shows a scenario, when the magnitude of the $V_{\rm offset}$=-1.65
V is sufficient to facilitate a complete reset transition before the arrival
of the next set pulse, realizing a short-term memory effect. The calculated
time-dependence of $V_{\rm bias}^{\rm T}$ and the $R_{\rm T}$ memristor
resistance are displayed in gray and red, respectively. The corresponding
$\tau$ is exhibited in Fig. 2(c). Its time dependence exponentially magnifies
the effect of the linear-scale time-evolution of $V_{\rm bias}^{\rm T}$: The
resistive switching transition is drastically slowed down in both directions,
as lower $R_{\rm T}$ values and, thus, lower $V_{\rm bias}^{\rm T}$ levels are
approached. This behavior mimics the short-term potentiation (STP) known from
the early studies of the human nervous system [33].

In contrast, Fig. 2(d) demonstrates that by reducing the magnitude of the
negative voltage offset by $\approx$20% to $V_{\rm offset}$=-1.3 V, a long-
term memory effect can be induced. In this case $\tau$, shown in Fig. 2(e),
exceeds the separation of the programming voltage pulses and the Ta2O5
memristor cannot return to its HRS. Instead, the subsequent positive pulses
further decrease the resistance of the LRS, as seen in the red trace in Fig.
2(d). Such a long-term memory effect is reminiscent of the long-term
potentiation (LTP) of the biological synapses [33].

The previous simulations demonstrate that the learning/forgetting ability of
the simple analog circuit containing one nonvolatile memristor can be tuned
over orders of magnitude in the time domain by the convenient, linear-scale
adjustment of a negative voltage offset. Consequently, this feature can also
be exploited to distinguish between different temporal input signals. Figure
2(f) shows a simulation where $R_{\rm s,T}$ and $V_{\rm offset}$ were
optimized such that the resistance of the memristor exhibits only a short-term
excursion into a moderately low LRS upon receiving occasional, high-amplitude
noise spikes embedded in a white noise input stream. However, when a Gaussian
‘neural spike’ with a comparable amplitude but longer duration arrives, a
transition into a virtually permanent lower resistance LRS is triggered. This
demonstrates that the dynamics of the memristive signal detection circuit is
sensitive to the ‘strength’ of the input signal both in the voltage and time
domain: A transition from STP to LTP can be induced not only by increasing the
voltage amplitude at fixed length but also by increasing the length of the
signal at a certain voltage amplitude. Thereby the memristor circuit is
capable of reliable pattern recognition also in situations where traditional
voltage threshold-based trigger circuits are challenged by potential noise
spikes of short duration but high amplitude.

### Pulse sequence and neural spike detection experiments.

The simulation results of the signal detection scheme were experimentally
verified using a single Ta2O5 memristor and a $R_{\rm s,T}$=1 k$\Omega$ series
resistor, as shown in Fig. 3. Long- and short-term memory operation due to
uniform, positive voltage pulses over a constant negative background are
demonstrated in Fig. 3(a) and (b), respectively. Here the peak values of the
programming pulses as well as the initial conditions of the circuit are
identical, except for the negative voltage offset which was changed from
$V_{\rm offset}$=-1.6 V (long-term memory) to $V_{\rm offset}$=-2 V (short-
term memory). The selectivity of the STP/LTP response of the circuit to the
programming voltage amplitude was tested by exposing it to the input pattern
consisting of uniform programming pulses except for one which was 0.5 V higher
in its peak value, as shown in Fig. 3(c). Here, the negative offset is
optimized to erase the long-term effect of sub-threshold pulses, but the
third, higher pulse drives the system to a long-term memory state. This
observation implies that the circuit can function as a detector module which
recognizes super-threshold input signals by the transition into an enduring
LRS of the Ta2O5 memristor whereas sub-threshold signals only induce short-
term, fully recovering resistance changes, if any.

Figure 3: Experimental demonstration of the voltage-tunable short-term/long-
term memory and neural voltage spike detection using a Ta2O5 memristor. (a)
Long-term memory response of the $R_{\rm T}$ memristor resistance (red) to an
equidistant voltage pulse train of uniform $V_{\rm pulse}^{0}$=2 V peak level,
$T_{\rm pulse}$=10 ms duration and 10 Hz repetition rate. The pulses are
superimposed at a moderate negative voltage offset of $V_{\rm offset}$=-1.6 V
(black). $R_{\rm s,T}$=1 k$\Omega$. (b) Short-term memory response of $R_{\rm
T}$ when the magnitude of the negative offset is increased to $V_{\rm
offset}$=-2 V whereas the peak value of the input voltage pulses remains
$V_{\rm pulse}^{0}$=2 V. (c) Same setting as in (b) with one $V_{\rm drive}$
voltage pulse applied with a higher peak value of $V_{\rm pulse}^{0}$=2.5 V,
triggering a long-term response of the Ta2O5 memristor. (d) 100 ms long
sequences of an input voltage signal consisting of white noise with 0.2 V rms
/ 1.6 V pp and a constant negative voltage offset of $V_{\rm offset}$=-0.042
V. Every second sequence contains a Gaussian voltage spike of $V_{\rm
neural}^{0}$=0.4 V and 10 ms width, as marked by the black arrows. (e) The
resistance response of the Ta2O5 memristor to the $V_{\rm drive}$ sequences
shown in (d). (f) A 1 s long input voltage sequence of noise, negative voltage
offset and a single Gaussian voltage pulse, labeled as ‘neural spike’ (black),
utilizing the same parameters as in (d). A larger noise spike is also labeled.
The resistance response exhibits a short-term / long-term memory effect
induced by the noise spike / neural spike. In the presence of the input noise
$R_{\rm T}$ was calculated from the 1 ms long moving averages of the Ta2O5
memristor’s current and bias voltage.

Neural spike detection in a noisy environment, as proposed by the simulations
shown in Fig. 2(f), has been tested experimentally by applying independent
time series of identical white noise characteristics, a negative voltage
offset and occasional neural spikes, i.e., Gaussian voltage pulses to the
detector circuit. Example time traces of such input streams are illustrated in
Fig. 3(d), where every second sequence contains a Gaussian spike, as labeled
by the arrows. The measured resistance response of the memristor, shown in
Fig. 3(e) verifies that the neural spikes always trigger the transition into
an enduring LRS whereas random noise only results in quickly fading, smaller
resistance changes. This contrast is better exemplified in Fig. 3(f), where a
selected single time trace contains both a higher-amplitude, short noise spike
and a comparable amplitude, but longer lasting neural spike. The former
induces a smaller magnitude, quickly fading resistance drop while the latter
facilitates the transition to an enduring LRS.

For a statistical analysis 50-50 noisy time series including/lacking a neural
spike were experimentally evaluated by the detector circuit at nominally
identical conditions, assuming an optimized $V_{\rm offset}$. As successful
detection events only those time series are considered which (i) contain a
neural spike and only this spike is detected at its true position or (ii)
there is no neural spike in the stream and none is detected, accordingly. The
detection accuracy, defined as the ratio of the successfully classified
streams was found to be 99% at 0.4 V pulse amplitude and 0.2 V rms noise.
According to the rms to peak-to-peak (pp) conversion of white noise, this rms
value yields $<$1.6V peak-to-peak fluctuations in 98% of the time. In
comparison, an alternative approach based solely on the threshold switching
property of metal-oxide memristors yielded in $\approx$60% detection accuracy
at $\approx$1.7 V spike amplitude and 0.21 V rms / 1.1 V pp noise levels [34,
35, 36].

### Neural transceiver operation.

Figure 4: The operation of the coupled neural detector & oscillator circuit.
(a-d) Establishing the coupling symbolized by the lower dashed arrow in Fig.
1(g). (a) $V_{\rm drive}$ input signal sequence consisting of white noise with
0.24 V rms / 1.92 V pp, a negative voltage offset of $V_{\rm offset}$=-0.46 V
and a single Gaussian voltage spike of 0.47 V amplitude and 10 ms width. (b)
The corresponding $R_{\rm T}$ resistance response of the Ta2O5 memristor.
$R_{\rm s,T}$=1 k$\Omega$. (c) When the $R_{\rm T}$ resistance drops upon the
spike detection, the voltage change on the $R_{\rm s,T}$ series resistor
shifts the operation point of the VO2 module, triggering periodic $I_{\rm V}$
current oscillations at its output. The oscillations persist for a period
determined by the memory time constant of the detector module. $R_{\rm L}$=50
k$\Omega$, $R_{\rm s,V}$=1 k$\Omega$, $C$=4.4 nF. (d) Magnified view of the
$I_{\rm V}$ current oscillations shown in (c). (e-j) Adding the global
feedback symbolized by the upper dashed arrow in Fig. 1(g). (e) 100 ms long
sequences of an input voltage signal consisting of white noise with 0.22 V rms
/ 1.76 V pp and a constant negative voltage offset of $V_{\rm offset}$=-0.15
V. Every second sequence contains a Gaussian voltage spike of 0.5 V amplitude
and 10 ms width. (f) The $R_{\rm T}$ resistance of the Ta2O5 memristor
undergoes a set switching which triggers the oscillatory behavior of the
firing circuit. However, the coupling of the first oscillation at the output
to the input of the detector circuit restores the HRS of the Ta2O5 memristor
and, thus, terminates the current oscillation at the output after its first
period. (h-j) Magnified views of $V_{\rm drive}$, $R_{\rm T}$ and $I_{\rm V}$,
respectively, during a single input sequence utilizing the same parameters as
in (e). Note, that the $I_{\rm V}$ current spike is delayed with respect to
the set transition of $R_{\rm T}$ due to the low-pass filter established in
the coupling (see Methods section).

In order to add the transceiver functionality and automated reset to our
Ta2O5-based neural spike detection circuit, we extend it by a VO2-based neural
spike firing module and a global feedback loop, according to the blue shaded
layout parts and the gray dashed arrow in Fig. 1(g), respectively. The
detailed circuit implementation is outlined in the Methods section. First, we
discuss the behavior of the zero-feedback circuit which actuates a firing
output upon spike detection. Next, the global feedback is activated,
completing the circuit operation with output optimization and automated reset.

Figures 4(a-d) exemplify an experiment utilizing the input stream displayed in
Fig. 4(a), consisting of white noise, a single neural spike and a constant
negative voltage offset. The strength of the neural spike and the negative
voltage offset are adjusted such that the memory time constant of the detector
circuit is in the order of $\approx$100 ms, as shown in Fig. 4(b). While the
Ta2O5 memristor resides in its LRS, the voltage drop on the $R_{\rm s,T}$
series resistor, arising from the constant negative $V_{\rm offset}$, is
increased in magnitude due to the voltage divider effect of $R_{\rm T}$ and
$R_{\rm s,T}$. We utilize this voltage drop as the input signal of the VO2
oscillator module. The coupling between the detector and oscillator modules is
realized through a differential amplifier which sets the appropriate input
level for the VO2 circuit and also acts as a low-pass filter. This filtering
implements an integration time constant that averages out the rapidly changing
signal components, and practically measures the effect of the negative offset
voltage on the $R_{\rm s,T}$ series resistor. The latter exhibits an order of
magnitude increase upon the set transition of the Ta2O5 memristor. While the
Ta2O5 memristor is in its HRS, the oscillation module is in its steady state,
maintaining a constant, low-level $I_{\rm V}$ output current corresponding to
the HRS of the VO2 memristor. However, when the Ta2O5 circuit detects a neural
spike, the increased voltage input of the VO2 circuit results in the firing of
periodic current pulses, as shown in Fig. 4(c). This so-called tonic spiking
pattern, magnified in Fig. 4(d) is explained in terms of the periodic charging
and discharging of the parallel capacitor $C$ due to the current supplied
through $R_{\rm L}$ and the voltage-induced current instability of the VO2
memristor, respectively [26]. The conditions of the periodic firing are
maintained as long as the fading LRS of the Ta2O5 resides below a threshold,
determined by $V_{\rm offset}$, $R_{\rm s,T}$, the voltage gain of the
coupling amplifier and the $I(V)$ characteristics of the VO2 memristor. The
rise and fall times as well as the periodicity of the individual $I_{\rm V}$
output current pulses are tunable via the $R_{\rm L}$, $C$ and $R_{\rm s,V}$
component values.

Finally, the neuro-transceiver circuit is completed by introducing the global
feedback from its spiking output to the detector input. This is realized via a
second differential amplifier such that the positive valued output spikes of
the VO2 module appear with a negative sign in the $V_{\rm drive}$ detector
input stream. At the same time, they are amplified to a level where a single
negative spike is sufficient to trigger the reset transition of the Ta2O5
memristor in a short time compared to the repetition rate of the output
spikes. As a result, the oscillator module is brought back to its steady state
before the execution of its second output spike and the neuro-transceiver
circuit is ready to receive, detect and flag the next neural input spike.

The reliable operation of the above scheme is experimentally demonstrated in
Figs. 4(e-g) where the circuit is exposed to 10 independent input streams
consisting of white noise and a constant negative offset. The latter now
incorporates a portion of the default output through the global feedback loop.
Every second input sequence also contains a Gaussian neural spike, as shown by
the black traces in Fig. 4(e). The resistance response of the Ta2O5 memristor
is displayed in Fig. 4(f) in red. During the input sequences lacking a neural
signal $R_{\rm T}$ stays in the HRS and the corresponding $I_{\rm V}$ current
output of the VO2 module, shown in Fig. 4(e), also remains at a constant low
level. However, whenever a neural spike arrives at the input, $R_{\rm T}$
drops to the LRS, an output spike is triggered and the HRS of $R_{\rm T}$ is
restored. A magnified view of an independent time series, exhibited in Figs.
4(h-j), allows a better insight into the dynamics of the detection. The set
transition of $R_{\rm T}$ (red) occurs instantaneously during the $\approx$5
ms rise time of the neural spike (black). The output spike (blue) is fired 13
ms later. This delay corresponds to the elongated rise time of the detector
module’s output at the firing module’s input due to the low-pass filter
implemented in their coupling. The output spike simultaneously appears with a
negative sign at the input (black) through the feedback amplifier and
facilitates the reset of the Ta2O5 memristor and, thus, the whole circuit
within 1 ms.

Note, that the time constant of the low-pass filter exceeds not only the one
of the random fluctuations but also the duration of the neural spikes. This
grants that neither the noise nor the neural spikes can directly trigger the
firing of the VO2 circuit. The latter is only facilitated by the set
transition of the Ta2O5 memristor, whose latching operation improves the
reliability of the neuron circuit. Moreover, the filtering allows a longer
‘integration’ of the input stream by the detector circuit, resulting in higher
detection accuracy. The cut-off frequency of the coupling and, thus, the
integration time of the detector circuit are instrumentally optimized to suit
the specific input pattern.

The statistical evaluation of the detection accuracy of the complete neuro-
transceiver was carried out as described for the detector circuit in Section
2.3. In comparison to the latter, the experimentally verified detection
accuracy was slightly decreased from 99% to 98% at comparable signal-to-noise
ratio characterized by 0.5 V pulse amplitude and 0.22 V rms / 1.76 V pp noise
levels. The additional detection failure was identified to arise from the
partial set transition of the Ta2O5 memristor at a true pulse detection event
which was insufficient to access the oscillatory operation regime of the VO2
memristor.

##  III Conclusion

In conclusion, we experimentally demonstrated an artificial neuro-transceiver
unit realized by a coupled dynamical memristor circuit consisting of one
nonvolatile and one volatile memristor. The broad, voltage-tunable dynamics of
nonvolatile resistive switching was utilized to discriminate between random
noise and neural voltage spikes. As a key ingredient, a variable fading memory
was introduced to the LRS of the memristor by applying a negative voltage
offset. A close to 100% spike detection accuracy was achieved even at high
noise levels, which is attributed to the combined dynamical impact of the
amplitude and the duration of the neural spikes, in contrast to more noise-
sensitive voltage threshold detection schemes. In order to extend the neural
spike detection with conditional firing, the nonvolatile detector module was
coupled to a volatile Mott memristor oscillator circuit. The dynamical
complexity of the latter was exploited by alternating its operation point
between the linear HRS response and tonic spiking regimes according to the
actual output status of the spike detector. Finally, the artificial neuron
circuit was completed by adding a global feedback coupling. Thereby an
improved control over the firing output and an automated reset functionality
were facilitated.

As a basic operation flow, the artificial neuron was shown to detect neural
spikes in a noisy environment, fire a single output spike upon a successful
detection event and reset in a fully unsupervised, autonomous manner.
Moreover, thank to its simple architecture, the detector module or,
alternatively, a small number of parallel units can be conveniently sensitized
to detect different features in the input data stream at negligible training
costs, solely by adjusting the negative offset and $R_{\rm s,T}$ values. As
the applied Ta2O5 memristors exhibit voltage-tunable resistive switching times
spanning from bio-compatible time-scales down to picoseconds [3], a broad
variety of input signals can be considered. We propose that by taking
advantage of the rich dynamical complexity of the VO2 oscillator module [26],
such a versatility at the front-end can be complemented by a similar diversity
in the output pattern, giving rise to the realization of more general-purpose
neural signal processing units.

During standby conditions the involved memristors idle in their HRS keeping
the overall power consumption of the circuit extremely low. Meanwhile, the
requirements on the standard peripheral circuits facilitating the detector-
oscillator coupling and the global feedback are undemanding, which enables
their low-cost CMOS integration and packaging. Fulfilling these key criteria
allows the seamless integration of our neuron circuit into a plethora of edge
computing applications.

##  IV Methods

Sample fabrication. The 10 nm thick Ti adhesive layer and the 40 nm thick Pt
bottom electrode of the Ta/Ta2O5/Pt memristor were subsequently deposited on a
280 nm thick SiO2 substrate by electron beam evaporation at a base pressure of
10-7 mbar at a rate of 0.1 nm/s. The 5 nm thick Ta2O5 layers were sputtered by
reactive high-power impulse magnetron sputtering (HiPIMS) from a Ta target at
6 mTorr pressure, 45 sccm Ar and 5 sccm O2 flow rates and 250 W RF power. The
thickness and stoichiometric composition of the Ta2O5 layer were confirmed by
XPS spectroscopy. The Ta top electrode and its Pt cap were sputtered on top of
the Ta2O5 film at 4 mTorr pressure, 45 sccm Ar flow and 250 W RF power / 125 W
dc power for Ta / Pt, preventing the formation of a native oxide layer at the
Ta2O5/Ta interface. The 2.5 $\mu$m wide bottom and top electrodes were
patterned by standard optical lithography and lift-off.

The VO2 films were created by the post-deposition heat treatment of a
Si/SiO2/V structure, where the SiO2 / V thickness was 1 $\mu$m / 100 nm. The
heat treatment was carried out in air at 400 ∘C temperature and 0.1 mbar
pressure over 4.5 hours, resulting in a 180 nm thick V2O5 bottom layer and a
40 nm thick VO2 top layer as verified by cross-sectional TEM and EELS analyses
[31]. The metal electrodes consisting of a 10 nm thick Ti adhesion layer and a
50 nm thick Au film were patterned by standard electron-beam lithography and
deposited by electron-beam evaporation at 10-7 mbar base pressure at rates of
0.1 nm/s and 0.4 nm/s, respectively, followed by lift-off.

Figure 5: The switching dynamics of the Ta2O5 memristor. (a) Simulated $I(V)$
traces showing the effect of changing the $V_{\rm drive}^{0}$ amplitude of the
triangular driving voltage signal at $f_{\rm drive}$=10 Hz. (b) Simulated
$I(V)$ traces illustrating the effect of changing $f_{\rm drive}$ at a
constant $V_{\rm drive}^{0}$=1.4 V. (c) Color plot of the $R_{\rm HRS}/R_{\rm
LRS}$ ratio deduced from the zero-bias slopes of the simulated $I(V)$ traces
as a function of the $V_{\rm drive}^{0}$ amplitude and $f_{\rm drive}$
frequency of the driving voltage signal. (d) Measured $I(V)$ traces sharing
the same $R_{\rm HRS}/R_{\rm LRS}$ resistance ratio at various $f_{\rm drive}$
and $V_{\rm drive}^{0}$ settings. The driving parameters and the calculated
resistance ratio are indicated by the circles in (c) whose colors correspond
to the individual measurements in (d). $R_{\rm s,T}$=1 k$\Omega$. The $I(V)$
curves in (a), (b) and (d) are vertically offset for clarity.

Switching dynamics simulation of the Ta2O5 detector circuit. Figure 5 shows
the results of the simulations in comparison with selected experimental $I(V)$
traces of the Ta2O5 memristor in series with $R_{\rm s,T}$=1 k$\Omega$. The
individual simulated traces in Figs. 5(a) and (b) illustrate the onset of
nonvolatile resistive switching as the $V_{\rm drive}^{0}$ is linearly
increased at a constant $f_{\rm drive}$ or, alternatively, as $f_{\rm drive}$
is exponentially decreased at a constant $V_{\rm drive}^{0}$. The color-scale
plot in Fig. 5(c) displays the $R_{\rm HRS}/R_{\rm LRS}$ resistance ratio
deduced from the zero-bias slopes of the simulated $I(V)$ traces for the
experimentally relevant 1.2 V$<V_{\rm drive}^{0}<$1.7 V voltage interval.
Note, that while the latter covers a $\approx$40% variation the $f_{\rm
drive}$ driving frequency spans over 5 orders of magnitude. The colored empty
circles in Fig. 5(c) label the driving parameters of the measured $I(V)$
traces shown in the corresponding colors in Fig. 5(d). The measured $I(V)$
characteristics in Fig. 5(d) unambiguously confirm that achieving an identical
$R_{\rm HRS}/R_{\rm LRS}$ resistance ratio at linearly increasing voltage
requires an exponentially increasing frequency. In the experiment, a constant
$R_{\rm HRS}/R_{\rm LRS}\approx$1.5 ratio was chosen, representing the onset
of resistive switching. We explored those $V_{\rm drive}^{0}$ and $f_{\rm
drive}$ settings which reproduced this ratio. Finally, the simulation
parameters were optimized at $a$=0.088 V and $b$=1.06 V by finding the best
match between the simulated and measured $I(V)$ traces throughout the
investigated $V_{\rm drive}^{0}$ – $f_{\rm drive}$ plane.

Figure 6: The detailed schematic of the neuron circuit. The $V_{\rm drive}$
input voltage is measured at channel B of a digital storage oscilloscope. The
current of the Ta2O5 / VO2 memristor is measured via a current amplifier
connected to channel C / channel A of the DSO. The coupling of the detector
(red) and oscillator (blue) modules is realized through a voltage amplifier.
Through the latter, the additional offset bias $V_{\rm DC}$ is added which
sets the operation point of the oscillator module. In order to limit the
output pattern of the neuron circuit to a single neural spike and to reset it
after a spike detection, the spiking output of the oscillator is fed back to
the input of the detector circuit via a second voltage amplifier. The labeled
passive circuit components were $R_{\rm s,T}=R_{\rm s,V}$=1 k$\Omega$, $R_{\rm
L}$=50 k$\Omega$ and $C$=4.4 nF.

The implementation of the neuron circuit. The artificial neuron circuit
consists of two main parts. Its detailed schematic including peripheral
instruments is shown in Fig. 6. The Ta2O5 module (red) is responsible for the
detection of the neural spikes in the input signal. The VO2 oscillator module
(blue) generates the output spikes. The $V_{\rm drive}$ input voltage pattern
of the neuron circuit is provided by adding the off-set spiking output of a
Rigol DG5252 arbitrary waveform generator (AWG) and the noise output of a
Siglent SDG1050 AWG via a LeCroy DA1850A differential amplifier. $V_{\rm
drive}$ is independently recorded at channel B of a Picoscope 6424E digital
storage oscilloscope (DSO). The output of the detector module, i.e., the
voltage on the $R_{\rm s,T}$ series resistor, is measured via a Femto
DLPCA-200 current amplifier (red) at channel C of the DSO. The operation point
of the oscillator module is set by the constant voltage output of an Agilent
33220A AWG unit. This constant voltage and the voltage output of the detector
module are added and amplified via a Tektronix AM502 differential amplifier
(red-blue). Additionally, this unit also incorporates a 100 Hz low-pass filter
to remove the noise from the input signal of the oscillator module, greatly
improving the reliability of the latter. The output of the oscillator module,
i.e., the voltage on the $R_{\rm s,V}$ series resistor, is measured via a
second Femto DLPCA-200 current amplifier (blue) at channel A of the DSO. The
feedback coupling (black) is incorporated to reset the neuron circuit after a
detection event, enabling continuous operation. It is implemented through an
SRS SR-235 amplifier located at the input of the circuit (red). This unit
amplifies the output of the oscillator module and adds it to the input signal
of the detector module with a negative polarity. The gain of the feedback must
be optimized to match the device characteristics of the Ta2O5 memristor. A too
strong reset pulse increases the risk that the detector circuit will idle in a
too high $R_{\rm HRS}$ or exhibit only a smaller, short-lived resistance
change upon the arrival of the next neural spike. In contrast, when the gain
of the coupling is too low, a single reset pulse may not be sufficient to
restore the optimal HRS. Consequently, a single neural spike detection event
triggers multiple output spikes.

## Acknowledgements

This research was supported by the Ministry of Culture and Innovation and the
National Research, Development and Innovation Office within the Quantum
Information National Laboratory of Hungary (Grant No.
2022-2.1.1-NL-2022-00004), and the NKFI K143169, K143282 and TKP2021-NVA-03
grants. Project no. 963575 has been implemented with the support provided by
the Ministry of Culture and Innovation of Hungary from the National Research,
Development and Innovation Fund, financed under the KDP-2020 funding scheme.
L.P. and Z.B. acknowledge the the support of the Bolyai János Research
Scholarship of the Hungarian Academy of Sciences. J.L., M.C. and N.J.O.
acknowledge the financial support of the Werner Siemens Stiftung.

## Author contributions

The Ta2O5-based temporal pattern recognition experiments were developed and
performed by D.M. The experiments with the combined Ta2O5 and VO2 circuit were
carried out by D.M., T.N.T. and R.K. The simulations were initiated by the
work of P.B. and were extended and finalized by D.M. The Ta2O5 memristors were
developed and fabricated by M.C. and N.J.O. in the group of J.L. The VO2
devices were developed and manufactured by L.P., T.N.T. and G.M. in the group
of J.V. The project was conceived and supervised by A.H. The manuscript was
written by M.C, D.M., T.N.T. and A.H. All authors contributed to the
discussion of the results.

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