# Fault-tolerant Quantum Error Correction Using a Linear Array of Emitters

Jintae Kim  Department of Physics, Sungkyunkwan University, Suwon 16419, Korea
Jung Hoon Han  Department of Physics, Sungkyunkwan University, Suwon 16419,
Korea  Isaac H. Kim<EMAIL_ADDRESS>Department of Computer Science,
University of California, Davis, CA 95616, USA

###### Abstract

We propose a fault-tolerant quantum error correction architecture consisting
of a linear array of emitters and delay lines. In our scheme, a resource state
for fault-tolerant quantum computation is generated by letting the emitters
interact with a stream of photons and their neighboring emitters. In the
absence of delay line errors, our schemes have thresholds ranging between
$0.32\%$ and $0.39\%$ against the standard circuit-level depolarizing error
model. Depending on the number of emitters $n_{e}$, we study the effect of
delay line errors in two regimes: when $n_{e}$ is a small constant of order
unity and when $n_{e}$ scales with the code distance. Between these two
regimes, the logical error rate steadily decreases as $n_{e}$ increases, from
an exponential decay in $\eta^{-1/2}$ to an exponential decay in $\eta^{-1}$.
We also carry out a detailed study of the break-even point and the fault-
tolerance overhead. These studies suggest that the multi-emitter architecture,
using the state-of-the-art delay lines, can be used to demonstrate error
suppression, assuming other sources of errors are sufficiently small.

##  I Introduction

One of the fundamental discoveries in quantum computation is the theory of
fault-tolerant quantum computation Gottesman (1998a, b, 2009); Kitaev (2003);
Aharonov and Ben-Or (2008); Knill et al. (1998). While realistic quantum
computers are noisy, if their noise rate is below the fault-tolerance
threshold, one can simulate the behavior of a noiseless quantum computer
arbitrarily well using a noisy quantum computer.

Recently, rapid progress in quantum computing technology led to an explosion
of works on fault-tolerant quantum computing architectures Barends et al.
(2014); Arute et al. (2019); Harty et al. (2014); Ballance et al. (2016);
Monroe and Kim (2013); Madsen et al. (2022); Levine et al. (2019); Norcia et
al. (2018); Saskin et al. (2019); Covey et al. (2019). These studies aim to
develop protocols tailored to specific hardwares, with the goal of maximizing
the efficiency of the underlying error correction protocols. One of the most
well-studied architecture is the surface-code based architecture, which are
well-suited for planar array of superconducting qubits Fowler et al. (2012).
Recent advances led to novel architectures suitable for implementing quantum
low-density parity check codes Tremblay et al. (2022); Delfosse et al. (2021);
Strikis and Berent (2023); Xu et al. (2023). These theoretical advances were
also accompanied by recent experimental milestones that demonstrate quantum
error correction Acharya et al. (2022); Ryan-Anderson et al. (2021, 2022);
Bluvstein et al. (2023).

However, near-term quantum computers are still not powerful enough to carry
out commercially useful quantum computations. A commonly cited commercial
application of quantum computation is the study of challenging molecules such
as FeMoCo Reiher et al. (2016). However, in spite of the progress made in
quantum algorithms, the number of $T$-gates — the most expensive fault-
tolerant gate due to the costly magic state distillation — is still estimated
to be between $10^{9}$ and $10^{10}$, with the number of logical qubits
estimated to be at least $10^{3}$ Lee et al. (2020); von Burg et al. (2020).

Manufacturing and controlling such large number of qubits can pose a
significant challenge. However, it is possible to mitigate this challenge by
exploiting the unique physics provided by certain platforms. One such approach
is to use a single-photon emitter such as quantum dot. With photons, a
promising approach is to build a cluster state, which is a resource state for
measurement-based quantum computation (MBQC) Raussendorf and Briegel (2001);
Raussendorf et al. (2003) as an avenue for doing quantum computation quite
distinct from those based on unitary circuits. Preparation of cluster state
using photons is a well-studied subject. Many protocols have been studied both
theoretically and experimentally Nielsen (2004); Walther et al. (2005);
Lindner and Rudolph (2009); Economou et al. (2010); Yokoyama et al. (2013);
Yoshikawa et al. (2016); Schwartz et al. (2016); Pichler et al. (2017); Larsen
et al. (2019); Asavanant et al. (2019); Wan et al. (2021); Shi and Waks
(2021); Ferreira et al. (2022); Roh et al. (2023); Bartolucci et al. (2021);
Bombin et al. (2021); Bourassa et al. (2021); Tzitrin et al. (2021).

For instance, it is well-known that an emitter can be used to create a one-
dimensional cluster state Lindner and Rudolph (2009). By using a single delay
line, a single emitter can prepare a two-dimensional cluster state Pichler et
al. (2017); Ferreira et al. (2022), which can be used for universal
measurement-based quantum computation Raussendorf et al. (2003).

With an additional delay line, one can even prepare a three-dimensional
cluster state Wan et al. (2021), which is a resource state for universal
_fault-tolerant_ quantum computation Raussendorf et al. (2005, 2006, 2007);
Roh et al. (2023). In this scheme, all that is required for building a fault-
tolerant logical qubit is a single emitter, two delay lines, and a single-
photon detector. Compared to the alternatives which would require controlling
hundreds if not thousands of physical qubits, the demand on the number of
experimental components is more modest.

However, there is an important caveat. The error rate one needs to demonstrate
error suppression puts a challenging demand on the quality of the delay line.
Assuming that the error rate per unit length in the delay line is $\eta$, it
was shown in Ref. Wan et al. (2021) that the logical error rate decays
exponentially with $\eta^{-\frac{1}{2}}$, provided that the other error rates
(e.g., two-qubit gates between the emitter and the photon) smaller than a
threshold. Unfortunately, assuming the circuit-level noise is a depolarizing
noise of strength of $0.1\%$, the existing state-of-the-art (loss) error rates
reported in the commercial delay lines Tamura et al. (2018) were below the
break-even point Wan et al. (2021). More precisely, if one were to use such a
delay line, logical error rate after error correction is expected to be
strictly higher than the circuit-level error. As such, while the approach of
Ref. Wan et al. (2021) was conceptually appealing, it did not seem practical
considering the current experimental capabilities.

Figure 1: Schematic description of our scheme, which is a linear array of
emitters and delay lines. Each emitter is connected to two delay lines,
designated as navy and blue lines, through which the photons propagate. The
detectors and the interactions between neighboring emitters are depicted using
triangles and thunder signs, respectively. Each emitter is responsible for
constructing a thin “slab” of cluster state that corresponds to a hexahedron.
Entanglement between these slabs, represented by red lines connecting them,
can be generated by applying an entangling gate between neighboring emitters.

The main purpose of this paper is to study a generalization of the scheme in
Ref. Wan et al. (2021) that can mitigate this issue. Our scheme involves
emitters that are arranged on a linear array. What we envision is a scheme
similar to the one proposed in Ref. Wan et al. (2021), but including extra
emitters that can interact with their neighboring emitters. A schematic
description of our approach is shown in Figure 1. We note that such a gate can
be applied between a pair of quantum dots, for instance Xue et al. (2021);
Noiri et al. (2022); Mills et al. (2022); Madzik et al. (2022); Philips et al.
(2022).

Generally speaking, as the number of emitters increase, the performance of our
scheme (quantified in terms of the lowest logical error rate one can achieve)
improves. We discuss these improvements on three fronts. First, if the number
of emitters $n_{e}$ is a constant of order unity (e.g., 2 or 3), the logical
error rate decays exponentially with $\sqrt{n_{e}/\eta}$. While this may seem
like a modest improvement over the $\eta^{-\frac{1}{2}}$ scaling in Ref. Wan
et al. (2021), we emphasize that the logical error rate decays _exponentially_
with these numbers. Therefore, increasing $n_{e}$ by a factor of few can lead
to a factor of few _orders of magnitude_ change in the logical error rate. We
observe this phenomena in our numerical studies.

Second, if the number of emitters is large, we obtain a more favorable scaling
form for the logical error rate. If $n_{e}$ is linear in the code distance
$d$, we find the logical error rate to decay exponentially with
$m^{-1}\eta^{-1}$ (instead of $\eta^{-\frac{1}{2}}$), where $m=d/n_{e}$.
Between this regime and the regime in which $n_{e}=O(1)$, the logical error
rate steadily improves as $n_{e}$ increases.

Our improvement stems from the fact that the time each photon experiences in
the delay line can be reduced as we increase the number of emitters. Thus by
increasing the number of emitters, one effectively reduces the amount of error
each photon is experiencing in the delay line. This explains why, as we
increase the number of emitters, the logical error rate improves. This
suggests that increasing the number of emitters is generally favorable,
provided that the two-qubit error rates between the neighboring emitters are
sufficiently low.

Experimentally, while two-qubit gate fidelities exceeding 99% have been
demonstrated in a small number of quantum dots Xue et al. (2021); Noiri et al.
(2022); Mills et al. (2022); Madzik et al. (2022), scaling this to a larger
number may lead to a lower fidelity. (However, see Ref. Philips et al. (2022)
for the recent advance in scaling the system to up to six quantum dots.)
Therefore, a potential concern for our scheme is the practical challenge in
scaling the system whilst ensuring high two-qubit gate fidelities.

However, we show in this paper that the two-qubit error rate one can tolerate
is significantly higher than what one might naively expect. We consider an
anisotropic error model in which the ratio between the two-qubit error rate
between the emitters and the other gates can be varied. When $n_{e}=O(1)$, we
find that the thresholds of our schemes remain practically unchanged even if
we assume that the two-qubit error rate between the emitters is almost ten
times larger than the other error rates. When $n_{e}$ is large, the thresholds
of our schemes do depend on the error ratio, though still in the range of
$2.5\times 10^{-3}\sim 4.0\times 10^{-3}$, similar to the thresholds of the
single-emitter protocols Wan et al. (2021). Thus our scheme is tolerant
against such experimentally motivated noise models.

The rest of the paper is structured as follows. In Section II, we provide an
executive summary of a cluster state preparation protocol which involves a
single emitter and two delay lines. This is similar to the one proposed in
Ref. Wan et al. (2021), but modified in a way that is suitable for the
generalization presented in Section III. In Section III, we propose several
cluster state preparation protocols using multiple emitters and delay lines.
In Section IV.1, we study the threshold of our scheme by varying the number of
emitters over several different error models, in the absence of delay line
error. We find the threshold to remain largely intact, independent of the
number of emitters, even if the gates between the emitters are far noisier
than the other gates. In Section IV.2, we extend the analysis in Section IV.1
to the setup in which the delay line error is present. In Section IV.3, we
addressed the improvement of a multi-emitter protocol in comparison to a
single-emitter protocol. In Section V, we conclude with a discussion. In
particular, we focus on the prospect of achieving error suppression using
realistic experimental parameters, using the multi-emitter architecture we
propose.

##  II Single emitter protocols

In this Section, we provide an executive summary of a protocol for preparing a
three-dimensional (3D) cluster state using a single emitter. While the main
body of our work follows that of Ref. Wan et al. (2021), we also make some
changes that are suitable for our generalization to the multi-emitter
protocols in Section III.

Physically, the emitter can be an atom or a quantum dot. However, our
exposition will simply view them as a qubit, interacting with photons, which
can be viewed as another qubit. To differentiate the two, we shall refer to
the emitter as the _ancilla qubit_ and the photons as _data qubits_. From this
perspective, the operations enacted on the emitter and the photons are simply
the oft-used gates such as controlled-$Z$ ($\mathsf{CZ}$), controlled-NOT
($\mathsf{CNOT}$), and Hadamard. (Note, however, that the entangling gate is
only applied between the ancilla and a data qubit, not between data qubits.)
For the details on the experimental implementation, see Ref. Wan et al.
(2021).

The main purpose of using these gates is to ultimately prepare some _cluster
states_ , also known as graph states. This state is defined in terms of a
graph $G=(V,E)$. Here $V$ is a set of vertices and $E$ is a set of
(undirected) edges. We will represent the edge between vertices $i,j\in V$ as
$\\{i,j\\}=\\{j,i\\}$. Then the cluster state $|\psi_{G}\rangle$ is defined as

$\displaystyle|\psi_{G}\rangle=\prod_{(i,j)\in
E}Z_{i,j}\bigotimes_{i^{\prime}\in V}|+\rangle_{i^{\prime}},$ (1)

where $Z_{i,j}$ is the $\mathsf{CZ}$ gate on the $\\{i,j\\}$ edge. Note that
the vertices in the graph only involve the data qubits. The ancilla qubit only
assists in creating the target cluster state $|\psi_{G}\rangle$; it is not
part of the qubits that constitute $|\psi_{G}\rangle$. The cluster state can
be described also in terms of the stabilizers. The canonical generating set of
the stabilizer group is $\left\\{X_{i}\prod_{j:\\{i,j\\}\in
E}Z_{j}:\\{i,j\\}\in E\right\\}$, where we denoted Pauli-$X$ and Pauli-$Z$ on
vertex $i$ as $X_{i}$ and $Z_{i}$, respectively.

###  II.1 Cluster state construction from a single emitter

Here we explain a general approach to prepare a cluster state, following the
discussion in Ref. Wan et al. (2021). A conventional approach is to prepare
all the qubits in the $|+\rangle$ state and apply $\mathsf{CZ}$ gate over
every edge Raussendorf and Briegel (2001); Raussendorf et al. (2003). However,
in our physical setup we cannot apply such gates directly because it is
difficult to directly apply an entangling gate between two photons.

One of the key technical observations in Wan et al. (2021) is that such
$\mathsf{CZ}$ operation can be mediated through an ancilla qubit. Here is the
key identity:

$\displaystyle Z_{i,j}|+\rangle_{Q}\otimes|+\rangle_{i}\otimes|+\rangle_{j}$
$\displaystyle=\text{SWAP}_{Q,i}Z_{Q,j}|+\rangle_{Q}\otimes|+\rangle_{i}\otimes|+\rangle_{j},$
(2)

where $Q$ is the ancilla qubit and ${\rm SWAP}_{a,b}$ is the $\mathsf{SWAP}$
gate acting on qubits $a$ and $b$. The protocols we describe below are based
on the repeated use of Eq. (2).

To that end, define a sequence of subgraphs $G[k]\subset G$ and a quasi-
subgraph $G[k]^{\prime}$ of the graph $G$ as follows:

$\displaystyle G[k]$ $\displaystyle\equiv([k],E[k]),$ $\displaystyle
G[k]^{\prime}$ $\displaystyle\equiv([k]\cup\\{Q\\},E[k]\cup\\{\\{Q,k\\}\\}),$
(3)

where $[k]=\\{1,\cdots,k\\}$ is a subset of data qubits whose elements are
labeled by a non-negative integer, and $E[k]=\\{\\{i,j\\}\in E:i,j\in[k]\\}$
is the set of edges among the data qubits in $[k]$. The quasi-subgraph
$G[k]^{\prime}$ contains, in addition to the vertices and edges in $G[k]$, a
vertex corresponding to the ancilla qubit $Q$ and an additional edge between
$Q$ and the $k$-th qubit.

We can repeatedly apply Eq. (2). Without loss of generality, the cluster state
obtained at the $k$-th step is related to the one at the $(k-1)$-th step as
follows Wan et al. (2021)

$\displaystyle\ket{\psi_{G[k]^{\prime}}}=$ $\displaystyle
Z_{Q,k}\text{SWAP}_{Q,k}Z_{Q,k-1}\Bigl{[}\prod_{i:\\{i,k\\}\in
E[k]}Z_{Q,i}\Bigl{]}\ket{\psi_{G[k-1]^{\prime}}}\otimes\ket{+}_{k}.$ (4)

While the operation $Z_{Q,i}$ can be easily applied in our setup, the
$\mathsf{SWAP}$ gate is not. This difficulty can be circumvented by using
another key identity Wan et al. (2021):

$\displaystyle
Z_{Q,j}\text{SWAP}_{Q,j}\ket{\phi}_{Q}\otimes\ket{+}_{j}=H_{Q}X_{Q,j}\ket{\phi}_{Q}\otimes\ket{0}_{j},$
(5)

where $X_{Q,j}$ is a $\mathsf{CNOT}$ gate with the ancilla as the control
qubit and $\ket{\phi}_{Q}$ is an arbitrary state of $Q$. With this identity,
the operations in Eq. (4) be realized entirely in terms of the Hadamard on
$Q$, $\mathsf{CNOT}$ and $\mathsf{CZ}$ gates between $Q$ (as the control) and
a data qubit. Thus we can sequentially build up the cluster state, arriving at
$|\psi_{G[|V|]^{\prime}}\rangle$. (Here $|V|$ is the number of vertices.)

To that end, we introduce a unitary $U_{k}$:

$\displaystyle U_{k}=H_{Q}X_{Q,k}Z_{Q,k-1}\Bigl{[}\prod_{i:\\{i,k\\}\in
E[k]}Z_{Q,i}\Bigl{]},$ (6)

and rewrite $\ket{\psi_{G[k]^{\prime}}}$ in Eq. (4) as

$\displaystyle\ket{\psi_{G[k]^{\prime}}}$
$\displaystyle=U_{k}\ket{\psi_{G[k-1]^{\prime}}}\otimes\ket{0}_{k}$
$\displaystyle=\Bigl{[}\prod_{j=1}^{k}U_{j}\Bigl{]}\ket{+}_{Q}\bigotimes_{i=1}^{k}\ket{0}_{i}.$
(7)

The state $\ket{\psi_{G[k]^{\prime}}}$ is obtained by applying $U_{1}$ through
$U_{k}$ on the initial product state
$\ket{+}_{Q}\bigotimes_{i=1}^{k}\ket{0}_{i}$. At the very end, we apply
$Z_{Q,|V|}$ to disentangle the ancilla from the data qubit and obtain
$\ket{\psi_{G}}$:

$\displaystyle
Z_{Q,|V|}\ket{\psi_{G[|V|]^{\prime}}}=\ket{+}_{Q}\otimes\ket{\psi_{G}}.$ (8)

This completes the generation of the desired cluster state $|\psi_{G}\rangle$.

###  II.2 Protocols

Protocol S1 Cluster state construction with one emitter

1:initialize $Q$ in $\ket{+}$

2:for $k=1$ to $|V|$ do

3: initialize qubit $k$ in $\ket{0}$

4: if $\\{k-1,k\\}\in E$ then $\triangleright$

5: apply $H_{Q}X_{Q,k}\prod_{i\neq k-1\&\\{i,k\\}\in E[k]}Z_{Q,i}$
$\triangleright$

6: else$\triangleright$

7: apply $H_{Q}X_{Q,k}Z_{Q,k-1}\prod_{i:\\{i,k\\}\in
E[k]}Z_{Q,i}$$\triangleright$

8: end if$\triangleright$

9:end for

10:apply $Z_{Q,|V|}$

Protocol S2 Cluster state construction with one emitter and its measurement
and reinitialization

1:initialize $Q$ in $\ket{+}$

2:for $k=1$ to $|V|$ do

3: initialize qubit $k$ in $\ket{0}$

4: apply $H_{Q}X_{Q,k}\prod_{i<k-1\&\\{i,k\\}\in E[k]}Z_{Q,i}$
$\triangleright$

5: if $\\{k,k+1\\}\notin E$ or $k=|V|$ then$\triangleright$

6: apply $Z_{Q,k}$$\triangleright$

7: measure $Q$ in the Z-basis$\triangleright$

8: re-initialize $Q$ in $\ket{+}$$\triangleright$

9: end if$\triangleright$

10:end for

There were several protocols proposed in Ref. Wan et al. (2021) for cluster
state preparation. We found that some of those are readily generalized to the
multi-emitter setup whereas some are not. We introduce two protocols —
Protocol S1 and Protocol S2— that are easily adaptable to the multi-emitter
case.111For the readers familiar with Ref. Wan et al. (2021), we remark that
our Protocol S1 is in fact Algorithm 2 of Ref. Wan et al. (2021). Also,
Protocol S2 is a slight variant of Protocol B in Ref. Wan et al. (2021); here
we apply $Z_{Q,k}$ prior to measuring $Q$ in the Z-basis whereas in Ref. Wan
et al. (2021), they apply $Z_{k}$ after the measurement, specifically when the
measurement outcome is $\ket{1}$. (Here the Roman letter S stands for the
_single_ emitter.) The main difference between the two protocols is that
Protocol S1 is purely unitary whereas Protocol S2 involves measurements and
re-initialization of $Q$.

We remark that the conditional statement in the protocols are included to
minimize redundant operations, thereby avoiding extra unnecessary errors. More
precisely, if $\\{k-1,k\\}\in E$ belongs to the graph $E$, $U_{k}$ in Eq. (6)
involves the application of $Z_{Q,k-1}$ twice. This is because the qubit $k-1$
is linked to the ancilla qubit $Q$ in the quasi-subgraph
$\ket{\psi_{G[k-1]^{\prime}}}$. Consequently, executing the optimized version
of $U_{k}$ (lines 4-8 in Protocol S1) results in fewer errors. In Protocol S2,
lines 4-9 correspond to the optimized $U_{k}$ for that protocol.

At first, one might worry that these protocols involve interaction of the
ancilla qubit with an extensive number of data qubits. This can potentially
lead to a single error on the ancilla qubit propagating to an extensive number
of qubits. However, a remarkable fact first discovered in Ref. Wan et al.
(2021) is that their protocols do not lead to such adverse propagation of
errors. A similar analysis can be carried out for our protocols. Also in our
protocols one can find that the circuit-level one- or two-qubit errors
propagate to, up to stabilizers, errors of constant weight.

###  II.3 Fault-tolerant error correction

Figure 2: Part of the $4\times 4\times 4$ 3D cluster state under periodic
boundary condition is depicted. Numbering of the data qubits reflect the way
the 3D cluster state is constructed by successively entangling additional data
qubits.

Once a (noisy) 3D cluster state is prepared, one can measure all the qubits in
the $X$-basis. These measurement outcomes can be then fed into a decoder,
which returns a correction. By studying whether the error and the correction
form a logical operator or not, one can decide whether a logical error
occurred or not Dennis et al. (2002); Raussendorf et al. (2005, 2006, 2007).
We carried out such a numerical simulation using Protocols S1 and S2, the
result of which is presented below. (We assumed periodic boundary condition
for both Protocols S1 and S2.) Throughout this paper we used the minimum-
weight perfect matching (MWPM) decoder, employing the open source code
PyMatching Higgott and Gidney (2022) and Stim Gidney (2021).

####  II.3.1 Circuit-level noise

We first study the performance of Protocol S1 and S2 under the standard
circuit-level depolarizing noise. This is the standard model in which a
single- and two-qubit depolarizing noise is applied after a single- and two-
qubit gate is applied:

$\displaystyle{\cal D}_{a}^{(p)}(\rho)$
$\displaystyle=(1-p)\rho+\frac{p}{3}\sum_{P\in\\{X,Y,Z\\}}P_{a}\rho P_{a}$ (9)
$\displaystyle{\cal D}_{a,b}^{(p)}(\rho)$
$\displaystyle=(1-p)\rho+\frac{p}{15}\sum_{\begin{subarray}{c}P,P^{\prime}\in\\{I,X,Y,Z\\}\\\
(P,P^{\prime})\neq(I,I)\end{subarray}}P_{b}^{\prime}P_{a}\rho
P_{a}P_{b}^{\prime},$

where $I_{a}$, $X_{a}$, $Y_{a}$, and $Z_{a}$ are the identity and the three
Pauli gates acting on the vertex $a$. Here $\mathcal{D}_{a}^{(p)}$ is the
single-qubit depolarizing channel of strength $p$ applied to qubit $a$ and
$\mathcal{D}_{a,b}^{(p)}$ is the two-qubit depolarizing channel over qubit $a$
and $b$.

Against this noise model, we estimated the logical error rate $\overline{p}$
for a 3D cluster state of size $L\times L\times L$, where $L$ is even to
satisfy periodic boundary condition. We averaged over $10^{5}$ realizations
for each choice of $p$ and $L$. We estimate the logical error rate by fitting
the data to a quadratic scaling ansatz

$\displaystyle\overline{p}=\alpha+\beta(p-\mu)d^{1/\nu}+\gamma(p-\mu)^{2}d^{2/\nu},$
(10)

where $d=L/2$ and $(\alpha,\beta,\mu,\nu)$ are determined by fitting the data.

Figure 3: Logical error rate ($\overline{p}$) versus circuit-level noise ($p$)
for (left) Protocol S1 and (right) Protocol S2 with solid curves from fits to
Eq. (10). The threshold values for Protocol S1 and S2 extracted from the curve
crossing are $0.324\%$ and $0.390\%$, respectively.

The results of these simulations are shown in Figure 3. The threshold values
$p_{\rm th}$ of $0.324\%$ and $0.390\%$ were obtained for Protocols S1 and S2,
respectively. We remark that the threshold value of $0.390\%$ for Protocol S2
is the same as that of Protocol B in the Ref. Wan et al. (2021), as expected.
However, the logical error rates of Protocol S2 we obtain are higher than
those obtained in Wan et al. (2021). This is likely due to the different
boundary conditions employed in our calculations. (We used the periodic
boundary condition whereas Ref. Wan et al. (2021) used an open boundary
condition.)

Figure 4: Top panel: logical error rates $\overline{p}$ versus (left)
dephasing error rate ($\eta_{z}$) for Protocol S1 (middle) dephasing error
rates for Protocol S2 (right) loss error rates ($\eta_{\rm loss}$). Bottom
panel: $\overline{p}_{*}$ and its ansatz in Eq. (13) versus (left)
$\eta_{z}^{-1/2}$ for Protocol S1 (middle) $\eta_{z}^{-1/2}$ for Protocol S2
(right) $\eta_{\rm loss}^{-1/2}$. The legend represents
$\log\overline{p}_{*}$. The $y$-axis are on a logarithmic scale.

####  II.3.2 Delay line error

The study in Section II.3.1 excludes an important source of error. Recall that
the data qubits are photons, which at times propagate through a delay line.
Each photon experiences an error for each unit of length they travel. We
include the effect of such delay line error, following the discussion in Ref.
Wan et al. (2021).

The error associated with each delay line — from the emission of the data
qubit into the delay line to the eventual measurement — is proportional to the
time the photon spends in the delay line. This is equal to the time it takes
to apply $U_{k}$, which will constitute a convenient unit of time. We assume
that each $U_{k}$ operation consumes an equal amount of time. Throughout this
paper, we will assume that there is a fixed error rate associated with this
unit time, denoted as $\eta$ with an appropriate subscript, as we describe
below.

There are two primary sources of errors in the delay line: dephasing and
(heralded) loss error. Dephasing error is a stochastic application Pauli-$Z$
errors on the data qubit $a$ with error rate $\eta_{z}$:

$\displaystyle{\cal Z}_{a}^{(\eta_{z})}(\rho)$
$\displaystyle=(1-\eta_{z})\rho+\eta_{z}Z\rho Z.$ (11)

The errors are repeatedly applied for every unit of time to every data qubit
traveling in the delay line.

For the loss error, instead of applying the loss error for every unit of time,
we consider a phenomenological noise model in which a loss error proportional
to the total length of the delay line is applied at the very end of the
protocol. This time is proportional to $L^{2}$ in the leading order, and as
such, the error model can be described as follows:

$\displaystyle{\cal Z}_{a}^{(\eta_{\rm loss})}(\rho)=(1-L^{2}\eta_{{\rm
loss}})\rho+L^{2}\eta_{{\rm loss}}\frac{I}{2}.$ (12)

(We will justify this phenomenological noise model further later in this
Section, while discussing Table 1.)

Under the error models in Eq. (11) and (12), there cannot be a threshold
because the error rate increases with $L$. The optimal choice of $L$ is
proportional to $\eta^{-\frac{1}{2}}$ (with appropriate subscripts, depending
on the error model) Wan et al. (2021); Shapourian and Shabani (2022), whose
precise value can be obtained by increasing $L$ for a fixed value of $\eta$
until logical error rate starts to increase.

For the readers’ convenience, we briefly review the heuristic reason behind
this scaling. While the strength of the circuit-level noise remains as a
constant, independent of the system size, the delay line error on each qubit
scales with $L^{2}$. If the circuit-level error is smaller than the threshold,
there is a constant amount of error budget for the delay line such that, if we
are below this budget, the total amount of error is still below the threshold,
ensuring error suppression. This means that, insofar as $\eta L^{2}$ is
smaller than some constant, the logical error rate is exponentially small in
$L$. The best possible choice of such $L$ is clearly proportional to
$\eta^{-\frac{1}{2}}$. Consequently, the optimal logical error rate (denoted
as $\overline{p}_{*}$) becomes Shapourian and Shabani (2022):

$\displaystyle\log(1/\overline{p}_{*})\simeq
c^{\prime}\eta^{-1/2}+c^{\prime\prime}$ (13)

for some constants $c^{\prime},c^{\prime\prime}>0$.

Now let us discuss the simulation results for Protocols S1 and S2 under these
error models. For the dephasing error [Eq. (11)], the circuit-level noise
discussed in Section II.3.1 remains the same. For the loss error [Eq. (12)],
we have removed the circuit-level noise and used the decoding algorithm in
Ref. Barrett and Stace (2010). (As we said already, though this noise model
may seem overly simplistic, we will justify this error model further.)

For the dephasing error model [Eq. (11)], we averaged over $10^{5}$ samples
for each choice of $(\eta_{z},L)$, fixing the circuit-level noise as
$p=10^{-3}$. For both Protocols S1 and S2, Eq. (13) describes our data points
well, as expected; see the bottom left plots of Figure 4. The same conclusion
applies to the loss error model [Eq. (12)] as well; see the rightmost figures
in Figure 4.

It is interesting to see what kind of error rate ($\eta$) is needed to achieve
a desired logical error rate $\overline{p}_{*}$. We have listed these values
in Table 1 (top) for the target logical error rate of
$\overline{p}_{*}=10^{-3},10^{-5},10^{-10},10^{-15}$. The same set of values
was obtained in Ref. Wan et al. (2021) using Protocol S2 and we listed them in
Table 1 (bottom) to compare against ours.

Let us first compare the result obtained for the dephasing error model. One
can see that, in order to achieve the same logical error rate, our scheme
requires a lower dephasing error than that of Ref. Wan et al. (2021). We
expect this discrepancy to be stemming from the different choice of boundary
conditions; we used periodic boundary condition whereas the in Ref. Wan et al.
(2021) they used open boundary condition. This suggests that it will be more
advantageous employ the open boundary condition.

$\overline{p}_{*}$ $\eta$ | Protocol S1 ($\eta_{z}$) | Protocol S2 ($\eta_{z}$) | Loss errors ($\eta_{\rm loss}$)
---|---|---|---
$10^{-3}$ | $1.25\times 10^{-5}$ | $2.48\times 10^{-5}$ | $1.27\times 10^{-4}$
$10^{-5}$ | $3.32\times 10^{-6}$ | $6.52\times 10^{-6}$ | $4.04\times 10^{-5}$
$10^{-10}$ | $6.92\times 10^{-7}$ | $1.33\times 10^{-6}$ | $9.23\times 10^{-6}$
$10^{-15}$ | $2.91\times 10^{-7}$ | $5.53\times 10^{-7}$ | $3.99\times 10^{-6}$

$\overline{p}_{*}$ $\eta$ | Dephasing errors ($\eta_{z}$) | Loss errors ($\eta_{\rm loss}$)
---|---|---
$10^{-3}$ | $6.5\times 10^{-5}$ | $7.4\times 10^{-4}$
$10^{-5}$ | $1.4\times 10^{-5}$ | $1.4\times 10^{-4}$
$10^{-10}$ | $2.5\times 10^{-6}$ | $2.4\times 10^{-5}$
$10^{-15}$ | $1.0\times 10^{-6}$ | $9.5\times 10^{-6}$

Table 1: (top) The requisite dephasing error rates for Protocols S1 and S2,
and the requisite loss error rates to achieve targeted logical error rates of
$\overline{p}_{*}=10^{-3},10^{-5},10^{-10},10^{-15}$ are listed. (bottom) The
same set of numbers obtained in Ref. Wan et al. (2021) using Protocol S2 is
listed.

Now we discuss the results obtained from the loss error model. As one can see
in Table 1, in order to achieve the same logical error rate, the physical loss
error rate needed in our scheme is lower compared to that of Ref. Wan et al.
(2021). Therefore, our estimate on the requisite loss error rate to achieve
the target logical error rate can be viewed as a conservative lower bound on
what is actually needed. The discrepancy between our result and the result in
Ref. Wan et al. (2021) is due to the choice of different boundary conditions
and loss error model.

Recall that the scheme in Ref. Wan et al. (2021), even applied to the state-
of-the-art loss error rate delay line Tamura et al. (2018), does not yield any
error suppression. Because the scheme discussed in this Section performs worse
than that of Ref. Wan et al. (2021), this scheme will also not yield any error
suppression. However, the schemes discussed in Section III will be
tantalizingly close to achieving error suppression, assuming the delay line
error is equal to the one reported in Ref. Tamura et al. (2018); see Section
IV. Accounting for the improvement in logical error rate one can have upon
employing the open boundary condition (as in Ref. Wan et al. (2021)), we
anticipate error suppression to be well within the reach by using the multi-
emitter approach delineated in Section III, applied to the periodic boundary
condition; see Section V.

##  III Multi-emitter protocols

In this Section, we introduce a generalization of the protocols in Section II
to the one that involves multiple emitters. A schematic description of our
setup is shown in Figure 1.

At a high level, our approach can be explained as follows. Instead of using
the single emitter to build up the entire cluster state, we distribute this
task to multiple emitters and delay lines. Each emitter is connected to two
delay lines as before, and the emitters form a linear array, as shown in
Figure 1. Each emitter is responsible for building up a thin “slab” of 3D
cluster state, whose thickness is $L/n_{e}$ for the cluster state of size
$L\times L\times L$, where $n_{e}$ is the number of emitters.

Of course, as it stands the state being created will be simply a set of
disconnected 3D cluster states on different slabs. In order to build an
isotropic 3D cluster state of size $L\times L\times L$, we need to further
generate entanglement between these slabs. Happily, such entanglement can be
generated by a simple modification of the single-emitter protocol [Section
II], by intermittently applying an entangling gate between the neighboring
emitters without having to entangle the data qubits belonging to different
slabs.

We will first go through a simple example illustrating this idea in Section
III.1. The general procedure shall be explained in Section III.2.

###  III.1 Two emitters: an example

Before we describe our protocol in its full generality, let us start with an
instructive example, focusing on the part of the protocol that differs the
most from the single-emitter protocol [Section II]. Without loss of
generality, suppose our goal is to prepare a cluster state associated with a
graph $G=(V,E)$. Assume that this graph can be partitioned into two subgraphs
$G_{1}=(V_{1},E_{1})$ and $G_{2}=(V_{2},E_{2})$ so that (i) $V=V_{1}\cup
V_{2}$ and (ii) $E_{1}$ and $E_{2}$ are edges inherited from $V_{1}$ and
$V_{2}$, respectively. Note that there are additional edges connecting the
vertices across $V_{1}$ and $V_{2}$; we will denote the set of these edges as
$E_{12}$.

By running the single-emitter protocol for $G_{1}$ and $G_{2}$ concurrently,
it is straightforward to create a tensor product of cluster states, each
associated with $G_{1}$ and $G_{2}$. However, we also need to generate
entanglement associated with the edges in $E_{12}$. How can we do that?

Figure 5: An example for a graph $G=(V_{1}\cup V_{2},E_{1}\cup E_{2}\cup
E_{12})$ where $G_{1}=(V_{1},E_{1})$ and $G_{2}=(V_{2},E_{2})$. The edges in
$E_{12}$ are represented by red lines.

Consider an example of a graph $G$ shown in Figure 5. If we grow the cluster
state associated with the graph $G$ by adding one vertex and the edges
connected to that vertex at a time following the numbering convention, there
will be two steps in which we would need to generate an entanglement
associated with edges in $E_{12}$: $\\{2_{1},2_{2}\\}$ and
$\\{3_{1},4_{2}\\}$. (Here the subscripts $1$ and $2$ represent the vertices
in $V_{1}$ and $V_{2}$, respectively.) Because the underlying procedure is
similar, we will focus on the latter. Suppose we have already created a
cluster state associated with all the vertices in Fig. 5 except $3_{1}$ and
$4_{2}$. When we add $3_{1}$ and $4_{2}$ to the existing cluster, we need to
add new edges, some of which are in $E_{1}\cup E_{2}$ and the rest in
$E_{12}$.

If we were to only add the edges in $E_{1}\cup E_{2}$, we can simply follow
the single-emitter protocol [Section II]. For each subgraph $G_{1}$ and
$G_{2}$, we can introduce an ancilla, denoted as $Q_{1}$ and $Q_{2}$,
respectively. We can apply the CZ gate between $Q_{1}$ and the vertices in
$V_{1}$ connected to $3_{1}$. Similarly, we can apply the CZ gate between
$Q_{2}$ and the vertices in $V_{2}$ connected to $4_{2}$. Then, we can apply
the CX and H to effectively swap the state of the ancilla qubits to some data
qubits [Eq. (5)], followed by a procedure that disentangles the ancilla qubits
from the rest.

However, before we swap the states, notice that we have an opportunity to
apply a CZ gate between the ancilla qubits. By doing so, we can generate an
entanglement between the two ancilla qubits. If we then follow the rest of the
procedure, e.g., swapping the state of the qubits and dientangling the ancilla
qubits, we end up exactly with the cluster state we want. Therefore, the
modified protocol simply involves adding a single additional CZ gate between
the ancilla qubits prior to swapping the state of the ancilla and the data
qubits.

We now discuss the overall procedure in more detail. First, consider the
situation where the vertices have been connected to form a cluster state
except that a graph associated with all the vertices $3_{1}$ and $4_{2}$ as
well as the two ancillas $Q_{1}$ and $Q_{2}$ are decoupled from the data
qubits [Figure 6 (a)]. Then we apply the gate between the ancilla qubits as
well as the gates between the ancilla and the data qubits [Figure 6 (b)].
Next, we apply an entangling CZ gate between the ancilla qubits [Figure 6
(c)]. Lastly, applying the procedure in Eq. (5), we obtain a cluster state
involving two additional data qubits $3_{1}$ and $4_{2}$ [Figure 6 (d)]. The
two ancilla qubits can be disentangled from the rest of the cluster state by
either applying CZ gates or measuring the ancilla qubits in the $X$-basis.

Figure 6: A procedure for generating the cluster state on the graph in Figure
5 using two emitters. Two more data qubits $3_{1}$ and $4_{2}$ are
incorporated into the cluster state after the procedure.

###  III.2 Generalization

The main difference between the single-emitter protocol [Section II] and the
examplary two-emitter protocol in Section III.1 is the presence of an
additional emitter and the CZ gate between the emitters. The prescription of
adding such CZ gates generalizes straightforwardly to the generation of
arbitrary cluster states, using arbitrary number of emitters, provided a
certain condition is met. We discuss this generalization (as well as the
condition we need) below.

Because the multi-emitter case is a simple generalization of the two-emitter
case, we focus on the protocol for two emitters. As before, we consider a
partition of a graph $G=(V,E)$ into two subgraphs $G_{1}=(V_{1},E_{1})$ and
$G_{2}=(V_{2},E_{2})$, so that $V=V_{1}\cup V_{2}$. The edges between $V_{1}$
and $V_{2}$ are denoted as $E_{12}$. For our protocol, we demand the following
condition: each vertex in $V_{1}$ is connected to at most one vertex in
$V_{2}$, and vice versa.

In analogy with our discussion on the single-emitter protocol [Eq. (3)], let
us define a subgraph $G[i_{1},j_{2}]$ and a quasi-subgraph
$G[i_{1},j_{2}]^{\prime}$ of the graph $G$ as follows:

$\displaystyle G[i_{1},j_{2}]$
$\displaystyle\equiv([i_{1}]\cup[j_{2}],E_{1}[i_{1}]\cup E_{2}[j_{2}]\cup
E_{12}[i_{1},j_{2}]),$ $\displaystyle G[i_{1},j_{2}]^{\prime}$
$\displaystyle\equiv([i_{1}]\cup[j_{2}]\cup\\{Q_{1},Q_{2}\\},E_{1}[i_{1}]\cup
E_{2}[j_{2}]\cup$
$\displaystyle~{}~{}~{}~{}E_{12}[i_{1},j_{2}]\cup\\{\\{Q_{1},i_{1}\\},\\{Q_{2},j_{2}\\}\\}).$
(14)

Here $[i_{1(2)}]=\\{1_{1(2)},\cdots,i_{1(2)}\\}$ is the numbered set of data
qubits in $G_{1(2)}$, and $E_{12}[i_{1},j_{2}]=\\{\\{k_{1},l_{2}\\}\in
E_{12}:k\in[i_{1}],l\in[j_{2}]\\}$ is the set of edges connecting the two
subgraphs $G_{1}$ and $G_{2}$. The quasi-subgraph $G[i_{1},j_{2}]^{\prime}$
contains, in addition to the vertices and edges in $G[i_{1},j_{2}]$, two
vertices $Q_{1}$, $Q_{2}$ and edges $\\{Q_{1},i_{1}\\},~{}\\{Q_{2},j_{2}\\}$.

The construction of the cluster state is based on a sequential generation of a
cluster state associated with a quasi-subgraph $G[i_{1},j_{2}]^{\prime}$,
incrementing indices ($i_{1}$ or $j_{2}$) by one at each step. Incrementation
of $i_{1}$ and $j_{2}$ are mediated by the ancilla qubits $Q_{1}$ and $Q_{2}$,
respectively. If neither $(i+1)_{1}$ nor $(j+1)_{2}$ are connected by an edge
in $E_{12}$, we will employ the single-emitter protocol [Section III]. Since
we have two ancilla qubits, both indices can be simultaneously increased by
one, without affecting each other.

If $(i+1)_{1}$ is connected by an edge in $E_{12}$ while $(j+1)_{2}$ is not,
we will utilize the single-emitter protocol to increment the index $j_{2}$.
This means the incrementation of $i_{1}$ should be interrupted. Conversely, if
$(j+1)_{2}$ is linked by an edge in $E_{12}$ but $(i+1)_{1}$ is not, we will
employ the single-emitter protocol to increase the index $i_{1}$, and
incrementing $j_{2}$ must be interrupted. If both $(i+1)_{1}$ and $(j+1)_{2}$
are connected by an edge in $E_{12}$, we apply the procedure analogous to the
one appearing in Figure 6(a-d).

This entails applying the following sequence of gates:

  1. 1.

We begin with a cluster state associated with a quasi-subgraph
$G[i_{1},j_{2}]^{\prime}$.

  2. 2.

In order to disentangle $Q_{1}$ and $Q_{2}$ from $i_{1}$ and $j_{2}$
respectively, we apply $Z_{Q_{2},j_{2}}$ and $Z_{Q_{1},j_{1}}$.

  3. 3.

By applying $\Bigl{[}\prod_{k_{1}:\\{(i+1)_{1},k_{1}\\}\in
E_{1}[i+1]}Z_{Q_{1},k_{1}}\Bigl{]}$ and
$\Bigl{[}\prod_{l_{2}:\\{(j+1)_{2},l_{2}\\}\in
E_{2}[j+1]}Z_{Q_{2},k_{2}}\Bigl{]}$, we entangle $Q_{1}$ and $Q_{2}$ with the
qubits in $V_{1}$ and $V_{2}$ that $(i+1)_{1}$ and $(j+2)_{2}$ must be
entangled with.

  4. 4.

Apply $Z_{Q_{1}},Q_{2}$ to entangle $Q_{1}$ and $Q_{2}$.

  5. 5.

Apply $X_{Q_{1},(j+1)_{1}}$ followed by $H_{Q_{1}}$, and similarly,
$X_{Q_{2},(j+2)_{1}}$ followed by $H_{Q_{2}}$.

Note that the last step [Step 5] realizes a swap between $Q_{1}$ and
$(i+1)_{1}$ followed by a CZ gate between the two (and the same set of gates
between $Q_{2}$ and $(j+1)_{2}$) [Eq. (5)].

Thus the overall procedure can be described as follow:

$\displaystyle\ket{\psi_{G[(i+1)_{1},(j+1)_{2}]^{\prime}}}=H_{Q_{2}}X_{Q_{2},(j+1)_{2}}H_{Q_{1}}X_{Q_{1},(i+1)_{1}}Z_{Q_{1},Q_{2}}\Bigl{[}\prod_{l_{2}:\\{(j+1)_{2},l_{2}\\}\in
E_{2}[j+1]}Z_{Q_{2},l_{2}}\Bigl{]}\Bigl{[}\prod_{k_{1}:\\{(i+1)_{1},k_{1}\\}\in
E_{1}[i+1]}Z_{Q_{1},k_{1}}\Bigl{]}$
$\displaystyle~{}~{}~{}~{}~{}~{}~{}~{}~{}~{}~{}~{}~{}~{}\times
Z_{Q_{2},j_{2}}Z_{Q_{1},i_{1}}\ket{\psi_{G[i_{1},j_{2}]^{\prime}}}\otimes\ket{0}_{(i+1)_{1}}\otimes\ket{0}_{(j+1)_{2}}.$
(15)

Repeating this procedure, we can obtain the cluster state associated with the
quasi-subgraph $G[|V_{1}|_{1},|V_{2}|_{2}]^{\prime}$. We can then apply
$Z_{Q_{1},|V_{1}|_{1}}$ and $Z_{Q_{2},|V_{2}|_{2}}$ to disentangle the ancilla
qubits from the data qubits, obtaining $\ket{\psi_{G}}$.

An extension of this method to the multi-emitter case is straightforward.
Provided that each vertex in each subgraph is connected to at most one vertex
in another subgraph, the exact same procedure works. Generalization of our
approach to the one that does not require the connectivity constraint is left
as a future work.

###  III.3 Optimized protocol for 3D cluster state

Building upon the multi-emitter protocol discussed in Section III.2, we now
discuss the protocols tailored to creating the 3D cluster state, called M1 and
M2.222We stated these protocols under the assumption that $|V_{1}|=|V_{2}|$
and all edges in $E_{12}$ are represented as $\\{i_{1},i_{2}\\}$. (Here M
stands for the _multi_ -emitter protocol.) We optimized this protocol
(compared to the one discussed in Section III.2) by removing the redundant
gates; see the if statements therein. The operations $O_{i_{1(2)}}$ and
$O_{i_{1(2)}}^{\prime}$ are defined as:

$\displaystyle O_{i_{1(2)}}$
$\displaystyle=\Bigl{[}\prod_{j_{1(2)}:\\{i_{1(2)},j_{1(2)}\\}\in
E_{1(2)}[i]}Z_{Q_{1(2)},j_{1(2)}}\Bigl{]}Z_{Q_{1(2)},i_{1(2)}}$ $\displaystyle
O_{i_{1(2)}}^{\prime}$
$\displaystyle=\Bigl{[}\prod_{j_{1(2)}\neq(i-1)_{1(2)}\&j_{1(2)}:\\{i_{1(2)},j_{1(2)}\\}\in
E_{1(2)}[i]}Z_{Q_{1(2)},j_{1(2)}}\Bigl{]}.$ (16)

The main difference between the two protocols is the way in which we implement
$U_{k}$ for vertices that are not connected to vertices in the other
subgraphs; M1 uses the one in Protocol S1 while M2 uses the one in Protocol
S2.

Protocol M1, M2 Cluster state construction with two ancilla qubits

1:initialize both $Q_{1}$ and $Q_{2}$ in $\ket{+}$

2:for $i=1$ to $|V_{1}|$ do

3: initialize qubits $i_{1}$ and $i_{2}$ in $\ket{0}$

4: if $i_{1}\notin V_{12}$ then

5: apply the $U_{k}$ in Protocol S1 to
$\ket{\psi_{G[(i-1)_{1},(i-1)_{2}]^{\prime}}}$ using $Q_{1}$ and $Q_{2}$ //
Protocol M1

or

apply the $U_{k}$ in Protocol S2 to
$\ket{\psi_{G[(i-1)_{1},(i-1)_{2}]^{\prime}}}$ using $Q_{1}$ and $Q_{2}$ //
Protocol M2

6: else

7: if $\\{(i-1)_{1},i_{1}\\}\in E_{1}$ then

8: if $\\{(i-1)_{2},i_{2}\\}\in E_{2}$ then

9: apply
$H_{Q_{2}}X_{Q_{2},i_{2}}H_{Q_{1}}X_{Q_{1},i_{1}}Z_{Q_{1},Q_{2}}O_{i_{2}}^{\prime}O_{i_{1}}^{\prime}$

10: else

11: apply
$H_{Q_{2}}X_{Q_{2},i_{2}}H_{Q_{1}}X_{Q_{1},i_{1}}Z_{Q_{1},Q_{2}}O_{i_{2}}O_{i_{1}}^{\prime}$

12: end if

13: else

14: if $\\{(i-1)_{2},i_{2}\\}\in E_{2}$ then

15: apply
$H_{Q_{2}}X_{Q_{2},i_{2}}H_{Q_{1}}X_{Q_{1},i_{1}}Z_{Q_{1},Q_{2}}O_{i_{2}}^{\prime}O_{i_{1}}$

16: else

17: apply
$H_{Q_{2}}X_{Q_{2},i_{2}}H_{Q_{1}}X_{Q_{1},i_{1}}Z_{Q_{1},Q_{2}}O_{i_{2}}O_{i_{1}}$

18: end if

19: end if

20: end if

21:end for

22:apply $Z_{Q_{1},|V_{1}|_{1}}$ and $Z_{Q_{2},|V_{2}|_{2}}$

As an example, an explicit partition of the graph associated to the 3D cluster
state (under periodic boundary condition) is shown in Figure 7. Here $G_{1}$
and $G_{2}$ corresponds to the left and the right graph and the blue (red)
data qubits correspond to the blue (red) face on the other graph. Note that
each vertex in $G_{1}$ is connected to at most one vertex in $G_{2}$ and vice
versa, as we demanded.

We chose the number of qubits in $G_{1}$ and $G_{2}$ to be the same and
labeled the vertices in such a way that the edges in $E_{12}$ are represented
by pairs of qubits labeled by the same integer (e.g.
$\\{1_{1},1_{2}\\},\\{4_{1},4_{2}\\}\cdots\in E_{12}$). This implies that when
beginning with the cluster state associated with $G[0_{1},0_{2}]^{\prime}$ and
considering the construction procedure [Section III.2], two newly introduced
vertices are either both unconnected by an edge in $E_{12}$ or both connected
by an edge in $E_{12}$. Therefore, we can achieve a simplified delay line
structure and optimize construction time, as the entire construction procedure
proceeds without interruption.

Figure 7: A part of the 3D cluster state over $8\times 8\times 8$ lattice
under periodic boundary condition.

We can generalize the conditions for optimizing the 3D cluster state
construction procedure using $n_{e}$ emitters, which does not allow for
interruption. Firstly, considering the fact that two emitters should interact
to entangle the qubits in two different subgraphs, we need an even number of
emitters; if not, an incrementation of one index for the subgraph has to be
interrupted. Secondly, $L/n_{e}$ must be an integer to ensure that the number
of qubits in different slabs is the same. In Section IV, we simulated all the
3D cluster state construction procedure satisfying these two conditions.

##  IV Fault-tolerant error correction using multiple emitters

In this Section, we report the results of a numerical simulation of M1 and M2.

###  IV.1 Threshold

In this Section, we study the thresholds for Protocols M1 and M2. Note that
the main difference between these protocols and the single-emitter protocols
[Section II] is the presence of CZ gate between the ancilla qubits. We will
employ the standard depolarizing noise model for this gate as well [Eq. (9)].

Figure 8: (top) threshold values versus $p_{e}/p$ for $2,4,6$ emitters
(bottom) threshold values versus $p_{e}/p$ for $L/2,L/4,L/6$ emitters are
depicted. The results associated with Protocols M1 and M2 are illustrated in
the blue series and red series, respectively. In the legends, the subscripts
denote the number of emitters.

Figure 9: Top tpanel: logical error rates versus dephasing error rates for
(left) $2$ emitters (middle) $4$ emitters (right) $6$ emitters, employing
Protocol M1; the numbers in the subscript represent the number of emitters.
Bottom panel: $\overline{p}_{*}$ and its ansatz in Eq. (17) versus
$\eta_{z}^{-1/2}$ for (left) $2$ emitters (middle) $4$ emitters (right) $6$
emitters, employing Protocol M1. The legend represents $\log\overline{p}_{*}$.
The $y$-axis are on a logarithmic scale.

Physically, the entangling gate used between the emitters may use a physical
mechanism different from the one used for the gate between the emitter and the
photon. For instance, the gate between the emitters may be based on an
exchange interaction Loss and DiVincenzo (1998) whereas the the gate between
the emitter and the photon involves an optical interaction that exploits
quantum dot’s ability to emit and absorb single photon Volz et al. (2014);
Sipahigil et al. (2016); Goban et al. (2014); Tiecke et al. (2014); Reiserer
et al. (2014). Therefore, it is reasonable to study an anisotropic error model
that treats the entangling gate between the emitters differently from the
rest. For this reason, we tune the ratio between the two sources of error.
More precisely, we denote the noise strength of the gate between the emitters
as $p_{e}$ and the noise strength of the rest as $p$ [Eq. (9)]. We studied the
threshold under different ratios of $p_{e}/p$.

Here are the details of our numerical study. We chose a range of values of
$1\leq p_{e}/p\leq 10$ for different number of emitters, using Protocol M1 and
M2. Each data point is averaged over $10^{5}$ samples. The thresholds were
obtained by fitting the data to the ansatz in Eq. (10). The results are shown
in Figure 8. The top figure shows the threshold when the number of emitters is
a constant independent of the code distance. The bottom figure shows the
threshold when the number of emitters scales linearly with the code distance.

The most striking conclusion from Figure 8 is that the threshold value barely
changes even if the the ratio $p_{e}/p$ approaches $10$, provided that $n_{e}$
is a constant independent of the code distance [Figure 8, top]. This suggests
that our scheme can tolerate a significantly higher error rate for the
entangling gate between the emitters compared to the other sources of error.
Our result is consistent with a recent study which also demonstrated a high
tolerance against an error at the interface in a modular approach to fault-
tolerantly correcting errors using the surface code Ramette et al. (2023).
While the underlying error model is not identical, the analytical arguments in
Ref. Ramette et al. (2023) can explain our observation qualitatively.

When the number of emitters scales linearly with the code distance, we do
observe a decrease in threshold as $p_{e}/p$ increases. Nonetheless, the order
of magnitude of the threshold remains the same.

###  IV.2 Delay line error

We now include the effect of the delay line errors. The error model associated
with this error is identical to the one used in Section II.3.2. For the CZ
gate between the ancilla qubits, we assume the error rate is equal to the
error rate of the other circuit-level noises, i.e., $p_{e}=p$.

As we discussed already in Section II, in the presence of a delay line error,
there is no threshold. A more relevant question was how one can optimally
choose the length of the delay line, given the error rate per unit length
$\eta$, and what the corresponding optimal logical rate $\overline{p}_{*}$ is.

Here, we aim to understand the same question but instead focusing on how to
obtain the logical error rate in terms of $n_{e}$ and $\eta$. There are two
regimes of interest, depending on whether the number of emitters is small or
large, compared to $L$.

Figure 10: Top panel: logical error rates versus dephasing error rates for
(left) $2$ emitters (middle) $4$ emitters (right) $6$ emitters, employing
Protocol M2. Bottom panel: $\overline{p}_{*}$ and its ansatz in Eq. (17)
versus $\eta_{z}^{-1/2}$ for (left) $2$ emitters (middle) $4$ emitters (right)
$6$ emitters, employing Protocol M2. The legend represents
$\log\overline{p}_{*}$. The $y$-axis are on a logarithmic scale.

For a fixed $n_{e}$, the strength of the delay line error on each qubit scales
linearly with $\eta L^{2}/n_{e}$. Therefore, in order to ensure that the
amount of accumulated error is smaller than the threshold (which is necessary
for error suppression), the maximum length one can have is
$L\propto\sqrt{n_{e}/\eta}$. Recalling that the logical error rate decays
exponentially with $L$, we expect the optimal logical error rate to be

$\displaystyle\log(1/\overline{p}_{*})\simeq
c^{\prime}n_{e}^{1/2}\eta^{-1/2}+c^{\prime\prime},$ (17)

where $c^{\prime}$ and $c^{\prime\prime}$ are positive constants. On the other
hand, we can also consider the case in which $n_{e}$ scales linearly with $L$,
i.e., $n_{e}=L/m$ for some integer $m$. In this case, the maximum length one
can have is $L\propto m^{-1}\eta^{-1}$. Then the optimal logical error rate
would be

$\displaystyle\log(1/\overline{p}_{*})\simeq
c^{\prime}m^{-1}\eta^{-1}+c^{\prime\prime}.$ (18)

$\overline{p}_{*}$ M1 | $n_{e}=2$ ($\eta_{z}$) | $n_{e}=4$ ($\eta_{z}$) | $n_{e}=6$ ($\eta_{z}$)
---|---|---|---
$10^{-3}$ | $2.91\times 10^{-5}$ | $5.66\times 10^{-5}$ | $8.32\times 10^{-5}$
$10^{-5}$ | $8.81\times 10^{-6}$ | $1.65\times 10^{-5}$ | $2.45\times 10^{-5}$
$10^{-10}$ | $1.95\times 10^{-6}$ | $3.57\times 10^{-6}$ | $5.34\times 10^{-6}$
$10^{-15}$ | $8.35\times 10^{-7}$ | $1.51\times 10^{-6}$ | $2.27\times 10^{-6}$

$\overline{p}_{*}$ M2 | $n_{e}=2$ ($\eta_{z}$) | $n_{e}=4$ ($\eta_{z}$) | $n_{e}=6$ ($\eta_{z}$)
---|---|---|---
$10^{-3}$ | $6.37\times 10^{-5}$ | $1.43\times 10^{-4}$ | $2.10\times 10^{-4}$
$10^{-5}$ | $1.76\times 10^{-5}$ | $3.91\times 10^{-5}$ | $6.29\times 10^{-5}$
$10^{-10}$ | $3.69\times 10^{-6}$ | $8.13\times 10^{-6}$ | $1.38\times 10^{-5}$
$10^{-15}$ | $1.55\times 10^{-6}$ | $3.41\times 10^{-6}$ | $5.89\times 10^{-6}$

Table 2: The requisite dephasing error rates for (top) Protocol M1 employing
$2,4,6$ emitters (bottom) Protocol M2 employing $2,4,6$ emitters to achieve
targeted logical error rates of
$\overline{p}_{*}=10^{-3},10^{-5},10^{-10},10^{-15}$ are listed.

Now we discuss the results of our simulations. We will primarily focus on the
effect of dephasing error, and only briefly mention about the loss error
simulation at the very end of this Section. We first comment on the case of
$n_{e}=O(1)$ [Eq. (17)]. We considered $n_{e}=2,4,6$ using $10^{5}$, $10^{6},$
and $10^{7}$ samples per data point, using the circuit-level depolarizing
noise of $p=10^{-3}$. (Larger number of $n_{e}$ required larger sample size
because the logical error rates obtained is lower.) All these data points were
well-described by the values of $c^{\prime}\approx 2.0\times 10^{-2}$ and
$c^{\prime\prime}\approx 1.4$ for M1 and $c^{\prime}\approx 3.0\times 10^{-2}$
and $c^{\prime\prime}\approx 1.7$ for M2, respectively; see Figure 9 and
10.333More precisely, for M1, we obtained $c^{\prime}=0.0215,0.0204,0.0204$
for $n_{e}=2,4,6$, respectively. For M2, we obtained
$c^{\prime}=0.0288,0.0302,0.0329$ for $n_{e}=2,4,6$, respectively. We remark
that the values of $c^{\prime}$ and $c^{\prime\prime}$ for algorithms M1 and
M2 are similar to those in S1 and S2, respectively (corresponding to the
$n_{e}=1$ case). Therefore, we can conclude that the ansatz in Eq. (17)
adequately describes the scaling behavior of the logical error rate. Using
this equation, we listed the requisite dephasing error rates to achieve
targeted logical error rates of
$\overline{p}_{*}=10^{-3},10^{-5},10^{-10},10^{-15}$ are summarized in Table 2
(top), (bottom).

Figure 11: Top panel: logical error rates versus dephasing error rates for
(left) $L/4$ emitters (middle) $L/6$ emitters (right) $L/8$ emitters,
employing Protocol M1. Bottom panel: $\overline{p}_{*}$ and its ansatz in Eq.
(18) versus $\eta_{z}^{-1}$ for (left) $L/4$ emitters (middle) $L/6$ emitters
(right) $L/8$ emitters, employing Protocol M1. The legend represents
$\log\overline{p}_{*}$. The $y$-axis are on a logarithmic scale.

For the case of $n_{e}=L/m$, we chose $m=4,6,8$ and employed Protocol M1
[Figure 11].444While we carried out the same simulation for Protocol M2 as
well, even with $10^{7}$ samples we could not determine the minimum logical
error rate $\overline{p}_{*}$. In particular, we could not obtain the
constants in Eq. (18). Nonetheless, we found the break-even point with $n=L/2$
to be greater than $2.9\times 10^{-3}$. Examining the plots presented in
Figure 11 (bottom), we observe a linear relationship between
$\log\overline{p}_{*}$ and $\eta_{z}^{-1}$ for $n_{e}=L/4,L/6,L/8$. The values
of $c^{\prime}$ and $c^{\prime\prime}$ obtained were $c^{\prime}\approx
2.1\times 10^{-3}$ and $c^{\prime\prime}\approx 1.7$ for all the cases.555More
precisely, we obtained $c^{\prime}=0.002104,0.002256,0.002008$ for $m=4,6,8$.
The requisite dephasing error rates to achieve targeted logical error rates of
$\overline{p}_{*}=10^{-3},10^{-5},10^{-10},10^{-15}$ are summarized in Table
3.

We remark that for $m=2$, the result of our simulation was inconsistent with
Eq. (18); see Figure 12 (left). More precisely, we obtained $c^{\prime}\approx
4.1\times 10^{-3}$, which is different from the other values of $m$ (which
were $c^{\prime}\approx 2.1\times 10^{-3}$). We believe this discrepancy is
coming from the fact that there are no qubits lying in the interior of the
slab for $m=2$ (unlike $m=4,6,8$).

$\overline{p}_{*}$ M1 | $n_{e}=L/4$ ($\eta_{z}$) | $n_{e}=L/6$ ($\eta_{z}$) | $n_{e}=L/8$ ($\eta_{z}$)
---|---|---|---
$10^{-3}$ | $1.07\times 10^{-4}$ | $6.83\times 10^{-5}$ | $4.87\times 10^{-5}$
$10^{-5}$ | $5.52\times 10^{-5}$ | $3.72\times 10^{-5}$ | $2.57\times 10^{-5}$
$10^{-10}$ | $2.50\times 10^{-5}$ | $1.74\times 10^{-5}$ | $1.18\times 10^{-5}$
$10^{-15}$ | $1.62\times 10^{-5}$ | $1.13\times 10^{-5}$ | $7.66\times 10^{-6}$
Table 3: The requisite dephasing error rates for Protocol M1 employing $L/4$,
$L/6$, $L/8$ emitters to achieve targeted logical error rates of
$\overline{p}_{*}=10^{-3}$, $10^{-5}$, $10^{-10}$, $10^{-15}$ are listed.

Lastly, let us briefly mention the result of our loss error simulation. To
that end, we considered the phenomenological noise model in Eq. (12),
employing the decoding algorithm in Ref. Barrett and Stace (2010); see Figure
12 (right). Each data point is obtained from $10^{4}$ samples. The only result
we present here are the case of $n_{e}=L/2$, which yields the lowest possible
logical error rate out of all possible choice of $n_{e}$ we discuss; see
Section IV.3.

Figure 12: Top panel: logical error rates versus (left) dephasing error rates
for $L/2$ emitters and (right) loss error rates for $L/2$ emitters. Bottom
panel: $\overline{p}_{*}$ and its ansatz in Eq. (18) versus (left)
$\eta_{z}^{-1}$ for $L/2$ emitters, and (right) $\eta_{\rm loss}^{-1}$ for
$L/2$ emitters. The legend represents $\log\overline{p}_{*}$. The $y$-axis are
on a logarithmic scale.

###  IV.3 Comparison: single- vs. multi-emitter

In this Section, we discuss what kind of improvements the multi-emitter
protocol [Section III] provides over the single-emitter protocol [Section II].
Recall that the optimal logical error rate improves as $n_{e}$ increases
[Section IV.2]. Since the largest possible value of $n_{e}$ is $n_{e}=L/2$, we
focus on comparing this case to the single-emitter protocol.

$\overline{p}_{*}$ $n_{e}=L/2$ | dephasing error($\eta_{z}$) | loss error($\eta_{\rm loss}$)
---|---|---
$10^{-3}$ | $3.77\times 10^{-4}$ | $6.85\times 10^{-4}$
$10^{-5}$ | $2.05\times 10^{-4}$ | $3.97\times 10^{-4}$
$10^{-10}$ | $9.58\times 10^{-5}$ | $1.94\times 10^{-4}$
$10^{-15}$ | $6.25\times 10^{-5}$ | $1.28\times 10^{-4}$
Table 4: The optimal requisite dephasing error rates for Protocol M1 and the
optimal requisite loss error rates to achieve targeted logical error rates of
$\overline{p}_{*}=10^{-3},10^{-5},10^{-10},10^{-15}$ are listed.

In Table 4, we listed the dephasing and loss error rates needed to achieve the
target logical error rates of
$\overline{p}_{*}=10^{-3},10^{-5},10^{-10},10^{-15}$. Comparing these results
to the simulation results for the single-emitter protocol [Table 1 (top)], we
observe an approximately a ten-fold improvement (for the dephasing error) and
a five-fold improvement (for the loss error) for achieving the break-even
point (defined as $\overline{p}_{*}=10^{-3}$). Even greater improvements are
achieved for lower target logical error rates.

##  V Discussion

In this paper, we propose protocols for constructing a cluster state using a
linear array of emitters. Our key observation is that the the protocol in Ref.
Wan et al. (2021) can be generalized to a protocol involving multiple emitters
with a simple modification: an intermittent application of CZ gates between
pairs of emitters.

Such a modification reduces the amount of time each photon travels in the
delay line, thereby improving the logical error rate overall. Although having
a larger number of emitters may be more challenging than having only a single
emitter, there are several reasons to prefer the multi-emitter protocol over
the single-emitter protocol. The primary reason is the improved logical error
rate. If one compares the delay line error rate needed to achieve the same
logical error rate, the multi-emitter protocol [Table 4] outperforms the
single-emitter protocol [Table 1] by a factor of at least $5\sim 10$,
depending on the error model and the target logical error rate. Second, our
protocol enjoys a high tolerance against two-qubit gates applied between the
emitters. The thresholds for such gates were shown to be at least ten-fold
larger than the threshold for the other gates [Figure 8]. Lastly, the number
of emitters is a tunable parameter in our scheme, and even a modest
improvement in the number of emitters immediately yield improvements in the
logical error rate [Section III.2].

An interesting question is whether an error suppression can be demonstrated
using our scheme in a realistic experiment. More specifically, we would define
error suppression as an outcome in which the logical error rate after the
error correction is lower than the physical error rate. Setting the physical
error rate of $p=10^{-3}$, assuming the dominant source of error in the delay
line is loss, we would obtain the break-even point
($\overline{p}_{*}=10^{-3}$) of $\eta_{\text{loss}}=6.85\times 10^{-4}$. This
is lower than what the state-of-the-art delay line can achieve, e.g.,
$\eta_{\text{loss}}=9.6\times 10^{-4}$ Tamura et al. (2018). Therefore, our
scheme, in the form presented in this paper, will not be able to achieve error
suppression, even if we assume we used the state-of-the-art delay lines.

However, we think there are a few simple modifications in the protocol that
can make the break-even point (for the delay line error) higher. Most
importantly, we think simply changing our boundary condition to the open
boundary condition will improve the result substantially. To see why, let us
remark that our setup differs from that of Ref. Wan et al. (2021); the latter
used an open boundary condition whereas we used a periodic boundary condition.
The details about the loss error model is also different. While we obtained a
similar threshold in spite of these differences, their sub-threshold behaviors
are more markedly different; we found the loss error rates needed in our
protocol to achieve specific target logical error rates were _lower_ than that
of Ref. Wan et al. (2021) by a factor of $3\sim 5$.

What would happen if we change the boundary condition to the open boundary
condition? We conjecture that the scaling form of the optimal logical error
rate [Eq. (17) and (18)] would be still valid even under such a condition,
though with different constants. Let us briefly justify it. First, we remark
that we are assuming that the circuit-level noise remains at $p=10^{-3}$,
which is below the threshold (in the absence of other error sources). The
additional error comes from the qubit loss, which is proportional to
$L^{2}/n_{e}$ for every qubit, for both error models. While the details about
this loss error model is different, this difference only causes a few
additional gates for each data qubit. More precisely, in Ref. Wan et al.
(2021), the loss can occur during the construction of the cluster state
whereas in our case the loss occurs at the very end of the protocol. When
qubit loss occurs during the construction of the cluster state, all subsequent
operations acting on the lost data qubit become identity operators Wan et al.
(2021). Therefore, in the entire procedure of gate operations, the loss error
model where qubit loss occurs at the very end of the protocol requires only a
few additional gate operations compared to the model where qubit loss occurs
during the construction of the cluster state. While these are clearly
different error models, they can be both described by some local error model.
As such, we do not expect the logical error rate scaling form to be different.

The constants in Eq. (17) can be inferred from the Ref. Wan et al. (2021). The
scaling relation in Ref. Wan et al. (2021) would correspond to the $n_{e}=1$
case in Eq. (17), yielding $c^{\prime}=0.096$ and $c^{\prime\prime}=3.37$.
Then, even with the use of two emitters ($n_{e}=2$), the requisite loss error
rate to reach the break-even point becomes $\eta_{\rm loss}=1.47\times
10^{-3}$, which is strictly larger than the reported error rate of $\eta_{\rm
loss}=9.6\times 10^{-4}$ Tamura et al. (2018). Therefore, provided that our
assumption on the error scaling is correct, we are led to the conclusion that
error suppression can be demonstrated with just two emitters and four delay
lines. This is more demanding than what was originally envisioned in Ref. Wan
et al. (2021), but only barely.

Of course, the picture we described so far is too simplistic. For one thing,
there can be an additional insertion error occurring as the photon moves in
and out of the delay line. Moreover, there are other schemes, such as the one
using concatenation, which were shown to improve the noise tolerance Li et al.
(2023). In order to more accurately assess the experimental prospect of our
multi-emitter protocol, it is important to accurately model these sources of
error and employ the error correction schemes that are adept at correcting
such errors.

###### Acknowledgements.

We thank Hassan Shapourian and Alireza Shabani for useful discussions and Yun-
Tak Oh for helping with simulations. J. K. was supported by the education and
training program of the Quantum Information Research Support Center, funded
through the National research foundation of Korea (NRF) by the Ministry of
science and ICT (MSIT) of the Korean government(No.2021M3H3A103657313). J.H.H.
was supported by the National Research Foundation of Korea (NRF) grant funded
by the Korea government (MSIT) (No. 2023R1A2C1002644). I. K. was supported by
the Cisco Research Gift Program.

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